Inventor
BEILSTEIN JR KENNETH EDWARD
US10 patents
Patents
10 patentsUS5786628AJul 28, 1998
Method and workpiece for connecting a thin layer to a monolithic electronic modules surface and associated module packaging
IBM127 citations98
US5670803ASep 23, 1997
Three-dimensional SRAM trench structure and fabrication method therefor
IBM140 citations98
US5719438AFeb 17, 1998
Method and workpiece for connecting a thin layer to a monolithic electronic module's surface and associated module packaging
IBM97 citations97
US6174763B1Jan 16, 2001
Three-dimensional SRAM trench structure and fabrication method therefor
IBM21 citations92
US5923181AJul 13, 1999
Methods and apparatus for burn-in stressing and simultaneous testing of semiconductor device chips in a multichip module
IBM41 citations90
US5686843ANov 11, 1997
Methods and apparatus for burn-in stressing and simultaneous testing of semiconductor device chips in a multichip module
IBM30 citations90
US5804464ASep 8, 1998
Semiconductor chip kerf clear method for forming semiconductor chips and electronic module therefore
IBM8 citations73
US5670428ASep 23, 1997
Semiconductor chip kerf clear method and resultant semiconductor chip and electronic module formed from the same
IBM6 citations73
US5644162AJul 1, 1997
Semiconductor chip having chip metal layer and transfer metal layer composed of same metal, and corresponding electronic module
IBM9 citations73
US4092548AMay 30, 1978
Substrate bias modulation to improve mosfet circuit performance
IBM11 citations66