Inventor

IYER VENKAT

US45 patents

⚠️ This page may combine multiple inventors who share the name “IYER VENKAT”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

IYER VENKAT

UNIQUIFY INC

Method for calibrating capturing read data in a read data path for a DDR memory interface circuit

Multiple gating modes and half-frequency dynamic calibration for DDR memory controllers

Continuous adaptive training for data interface timing calibration

Method for operating a circuit including a timing calibration function

Continuous adaptive data capture optimization for interface circuits

Double data rate (DDR) memory controller apparatus and method

Continuous adaptive data capture optimization for interface circuits

Continuous adaptive data capture optimization for interface circuits

Continuous adaptive data capture optimization for interface circuits

Double data rate (DDR) memory controller apparatus and method

Double data rate (DDR) memory controller apparatus and method

Multiple gating modes and half-frequency dynamic calibration for DDR memory controllers

Data interface circuit for capturing received data bits including continuous calibration

Continuous adaptive data capture optimization for interface circuits

Method for operating a data interface circuit where a calibration controller controls both a mission path and a reference path

INTEL CORP

I/O peripheral device for use in a store-and-forward segment of a peripheral bus

Dual termination serial data bus with pull-up current source

Parallel bit stuffing for a serial data transfer protocol

Sync regeneration in a universal serial bus

Bus controller and associated device drivers for use to control a peripheral bus having at least one store-and-forward segment

Digital system having a peripheral bus structure with at least one store-and-forward segment

Method and apparatus for generating both a uniform duty cycle clock and a variable duty cycle clock using a single state machine

FAIRCHILD SEMICONDUCTOR

Semiconductor die package using leadframe and clip and method of manufacturing

Method to manufacture a universal footprint for a package with exposed chip

Semiconductor die package and method for making the same

Semiconductor die package including multiple dies and a common node structure

Semiconductor die package and method for making the same

UNIQUIFY IP COMPANY LLC

Method for calibrating capturing read data in a read data path for a DDR memory interface circuit

Double data rate (DDR) memory controller apparatus and method

Double data rate (DDR) memory controller apparatus and method

Double data rate (DDR) memory controller apparatus and method

Double data rate (DDR) memory controller apparatus and method

FLEX LTD

System in package with double side mounted board

Methods of creating exposed cavities in molded electronic devices

Methods of creating exposed cavities in molded electronic devices

MICROCHIP TECH INC

Physical layer to link layer interface and related systems, methods and devices

Ethernet interface and related systems methods and devices

Changing a master node in a wired local area network and related systems, methods, and devices

JEON OSEOB

Semiconductor die package and method for making the same

Semiconductor die package and method for making the same

DILLON JIM

Energy optimization system

CRUZ ERWIN VICTOR R

Semiconductor die package using leadframe and clip and method of manufacturing

JOSHI RAJEEV

Semiconductor die package including multiple dies and a common node structure

NAT SEMICONDUCTOR CORP

Tape automated bonding of bumped tape on bumped die

SUBRAMANIAN VENKITESH

Audible consumption of content while traveling to a destination