Inventor
J Raja Prabhu
IN16 patents
⚠️ This page may combine multiple inventors who share the name “J Raja Prabhu”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
SHAOXING YUANFANG SEMICONDUCTOR CO LTD
11 patentsUS11588489B1Feb 21, 2023
Obtaining lock in a phase-locked loop (PLL) upon being out of phase-lock
SHAOXING YUANFANG SEMICONDUCTOR CO LTD5 citations71
US11658667B2May 23, 2023
Reduction of noise in output clock due to unequal successive time periods of a reference clock in a fractional-N phase locked loop
SHAOXING YUANFANG SEMICONDUCTOR CO LTD2 citations65
US11592786B1Feb 28, 2023
Time-to-digital converter (TDC) measuring phase difference between periodic inputs
SHAOXING YUANFANG SEMICONDUCTOR CO LTD3 citations65
US11736110B2Aug 22, 2023
Time-to-digital converter (TDC) to operate with input clock signals with jitter
SHAOXING YUANFANG SEMICONDUCTOR CO LTD2 citations64
US12261609B1Mar 25, 2025
Inter-PLL communication in a multi-PLL environment
SHAOXING YUANFANG SEMICONDUCTOR CO LTD1 citations58
US12149255B2Nov 19, 2024
Generating divided signals from phase-locked loop (PLL) output when reference clock is unavailable
SHAOXING YUANFANG SEMICONDUCTOR CO LTD0 citations57
US11967965B2Apr 23, 2024
Generating divided signals from phase-locked loop (PLL) output when reference clock is unavailable
SHAOXING YUANFANG SEMICONDUCTOR CO LTD0 citations57
US12026028B2Jul 2, 2024
Preventing reverse-current flow when an integrated circuit operates using power supplies of different magnitudes
SHAOXING YUANFANG SEMICONDUCTOR CO LTD0 citations56
US11711087B2Jul 25, 2023
Reducing noise contribution in compensating for unequal successive time periods of a reference clock in a fractional-N phase locked loop
SHAOXING YUANFANG SEMICONDUCTOR CO LTD0 citations55
US12249996B2Mar 11, 2025
Counter design for a time-to-digital converter (TDC)
SHAOXING YUANFANG SEMICONDUCTOR CO LTD0 citations53
US11923864B2Mar 5, 2024
Fast switching of output frequency of a phase locked loop (PLL)
SHAOXING YUANFANG SEMICONDUCTOR CO LTD0 citations47
AURA SEMICONDUCTOR PVT LTD
4 patentsUS10514720B1Dec 24, 2019
Hitless switching when generating an output clock derived from multiple redundant input clocks
AURA SEMICONDUCTOR PVT LTD5 citations68
US10700669B2Jun 30, 2020
Avoiding very low duty cycles in a divided clock generated by a frequency divider
AURA SEMICONDUCTOR PVT LTD3 citations65
US10892765B1Jan 12, 2021
Relocking a phase locked loop upon cycle slips between input and feedback clocks
AURA SEMICONDUCTOR PVT LTD1 citations61
US9742414B2Aug 22, 2017
Reducing errors due to non-linearities caused by a phase frequency detector of a phase locked loop
AURA SEMICONDUCTOR PVT LTD0 citations50