Inventor
HESTER PHILLIP D
US6 patents
Patents
6 patentsUS4680700AJul 14, 1987
Virtual memory address translation mechanism with combined hash address table and inverted page table
IBM137 citations96
US4970641ANov 13, 1990
Exception handling in a pipelined microprocessor
IBM29 citations92
US4788683ANov 29, 1988
Data processing system emulation with microprocessor in place
IBM47 citations92
US4775927AOct 4, 1988
Processor including fetch operation for branch instruction with control tag
IBM51 citations92
US4630195ADec 16, 1986
Data processing system with CPU register to register data transfers overlapped with data transfer to and from main storage
IBM26 citations92
US5146570ASep 8, 1992
System executing branch-with-execute instruction resulting in next successive instruction being execute while specified target instruction is prefetched for following execution
IBM20 citations81