Inventor
SAHOTA KASHMIR S
US20 patents
Patents
20 patentsUS5923993AJul 13, 1999
Method for fabricating dishing free shallow isolation trenches
ADVANCED MICRO DEVICES INC110 citations97
US6184141B1Feb 6, 2001
Method for multiple phase polishing of a conductive layer in a semidonductor wafer
ADVANCED MICRO DEVICES INC64 citations96
US5665199ASep 9, 1997
Methodology for developing product-specific interlayer dielectric polish processes
ADVANCED MICRO DEVICES INC78 citations96
US6927113B1Aug 9, 2005
Semiconductor component and method of manufacture
ADVANCED MICRO DEVICES INC31 citations92
US6503418B2Jan 7, 2003
Ta barrier slurry containing an organic additive
ADVANCED MICRO DEVICES INC52 citations92
US5665201ASep 9, 1997
High removal rate chemical-mechanical polishing
ADVANCED MICRO DEVICES INC38 citations92
US6720264B2Apr 13, 2004
Prevention of precipitation defects on copper interconnects during CMP by use of solutions containing organic compounds with silica adsorption and copper corrosion inhibiting properties
ADVANCED MICRO DEVICES INC45 citations89
US6217418B1Apr 17, 2001
Polishing pad and method for polishing porous materials
ADVANCED MICRO DEVICES INC17 citations84
US6773988B1Aug 10, 2004
Memory wordline spacer
ADVANCED MICRO DEVICES INC5 citations74
US6413869B1Jul 2, 2002
Dielectric protected chemical-mechanical polishing in integrated circuit interconnects
ADVANCED MICRO DEVICES INC10 citations74
US6410443B1Jun 25, 2002
Method for removing semiconductor ARC using ARC CMP buffing
ADVANCED MICRO DEVICES INC12 citations72
US7052969B1May 30, 2006
Method for semiconductor wafer planarization by isolation material growth
ADVANCED MICRO DEVICES INC4 citations63
US7141502B1Nov 28, 2006
Slurry-less polishing for removal of excess interconnect material during fabrication of a silicon integrated circuit
ADVANCED MICRO DEVICES INC2 citations62
US6770523B1Aug 3, 2004
Method for semiconductor wafer planarization by CMP stop layer formation
ADVANCED MICRO DEVICES INC5 citations62
US6723605B1Apr 20, 2004
Method for manufacturing memory with high conductivity bitline and shallow trench isolation integration
ADVANCED MICRO DEVICES INC5 citations62
US5840623ANov 24, 1998
Efficient and economical method of planarization of multilevel metallization structures in integrated circuits using CMP
ADVANCED MICRO DEVICES INC6 citations62
US7208382B1Apr 24, 2007
Semiconductor device with high conductivity region using shallow trench
ADVANCED MICRO DEVICES INC4 citations61
US7053446B1May 30, 2006
Memory wordline spacer
ADVANCED MICRO DEVICES INC0 citations52
US6699785B2Mar 2, 2004
Conductor abrasiveless chemical-mechanical polishing in integrated circuit interconnects
ADVANCED MICRO DEVICES INC1 citations52
US6426297B1Jul 30, 2002
Differential pressure chemical-mechanical polishing in integrated circuit interconnects
ADVANCED MICRO DEVICES INC0 citations52