Inventor
FRICKEY ROBERT E
US9 patents
Patents
9 patentsUS9679658B2Jun 13, 2017
Method and apparatus for reducing read latency for a block erasable non-volatile memory
INTEL CORP15 citations80
US9354973B2May 31, 2016
Data integrity management in memory systems
INTEL CORP4 citations72
US10236069B2Mar 19, 2019
Word line read disturb error reduction through fine grained access counter mechanism
INTEL CORP2 citations71
US9543019B2Jan 10, 2017
Error corrected pre-read for upper page write in a multi-level cell memory
INTEL CORP3 citations71
US9817600B2Nov 14, 2017
Configuration information backup in memory systems
INTEL CORP0 citations51
US9552159B2Jan 24, 2017
Configuration information backup in memory systems
INTEL CORP0 citations51
US9524774B2Dec 20, 2016
Lower page read for multi-level cell memory
INTEL CORP0 citations51
US9236136B2Jan 12, 2016
Lower page read for multi-level cell memory
INTEL CORP0 citations51
US9183091B2Nov 10, 2015
Configuration information backup in memory systems
INTEL CORP1 citations51