Inventor
ARP ANDREAS
DE19 patents
Patents
19 patentsUS7526743B2Apr 28, 2009
Method for routing data paths in a semiconductor chip with a plurality of layers
IBM9 citations84
US10564664B2Feb 18, 2020
Integrated skew control
IBM6 citations83
US10355683B2Jul 16, 2019
Correcting duty cycle and compensating for active clock edge shift
IBM2 citations73
US10348279B2Jul 9, 2019
Skew control
IBM3 citations73
US11256284B2Feb 22, 2022
Integrated skew control
IBM2 citations72
US10348278B2Jul 9, 2019
Method and apparatus for clock skew control with low jitter in an integrated circuit
IBM2 citations72
US8566771B1Oct 22, 2013
Automation of interconnect and routing customization
IBM5 citations72
US9306547B2Apr 5, 2016
Duty cycle adjustment with error resiliency
IBM3 citations71
US10892744B2Jan 12, 2021
Correcting duty cycle and compensating for active clock edge shift
IBM0 citations62
US10110205B2Oct 23, 2018
Method and apparatus for clock skew control with low jitter in an integrated circuit
IBM1 citations62
US8912824B1Dec 16, 2014
Method and apparatus for detecting rising and falling transitions of internal signals of an integrated circuit
IBM3 citations62
US7996808B2Aug 9, 2011
Computer readable medium, system and associated method for designing integrated circuits with loop insertions
IBM4 citations62
US10756714B2Aug 25, 2020
Skew control
IBM0 citations52
US10651834B2May 12, 2020
Method and apparatus for clock skew control with low jitter in an integrated circuit
IBM0 citations51
US10469063B2Nov 5, 2019
Method and apparatus for clock skew control with low jitter in an integrated circuit
IBM0 citations51
US10312892B2Jun 4, 2019
On-chip waveform measurement
IBM0 citations51
US10263606B2Apr 16, 2019
On-chip waveform measurement
IBM0 citations51
US8937494B1Jan 20, 2015
Method and apparatus for detecting rising and falling transitions of internal signals of an integrated circuit
IBM1 citations51
US9754063B2Sep 5, 2017
Reducing dynamic clock skew and/or slew in an electronic circuit
IBM0 citations41