Inventor
ALVAREZ SHEILA MARIE L
SG24 patents
⚠️ This page may combine multiple inventors who share the name “ALVAREZ SHEILA MARIE L”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
STATS CHIPPAC LTD
10 patentsUS9443797B2Sep 13, 2016
Semiconductor device having wire studs as vertical interconnect in FO-WLP
STATS CHIPPAC LTD55 citations96
US7830020B2Nov 9, 2010
Integrated circuit package system employing device stacking
STATS CHIPPAC LTD19 citations92
US7443015B2Oct 28, 2008
Integrated circuit package system with downset lead
STATS CHIPPAC LTD28 citations92
US7250685B2Jul 31, 2007
Etched leadframe flipchip package system
STATS CHIPPAC LTD25 citations92
US7148086B2Dec 12, 2006
Semiconductor package with controlled solder bump wetting and fabrication method therefor
STATS CHIPPAC LTD27 citations92
US9330994B2May 3, 2016
Semiconductor device and method of forming RDL and vertical interconnect by laser direct structuring
STATS CHIPPAC LTD22 citations89
US7414318B2Aug 19, 2008
Etched leadframe flipchip package system
STATS CHIPPAC LTD13 citations83
US7169641B2Jan 30, 2007
Semiconductor package with selective underfill and fabrication method therfor
STATS CHIPPAC LTD13 citations83
US7352055B2Apr 1, 2008
Semiconductor package with controlled solder bump wetting
STATS CHIPPAC LTD2 citations62
US7482683B2Jan 27, 2009
Integrated circuit encapsulation system with vent
STATS CHIPPAC LTD0 citations48
ST ASSEMBLY TEST SERVICES LTD
4 patentsUS6775140B2Aug 10, 2004
Heat spreaders, heat spreader packages, and fabrication methods for use with flip chip semiconductor devices
ST ASSEMBLY TEST SERVICES LTD79 citations96
US7153725B2Dec 26, 2006
Strip-fabricated flip chip in package and flip chip in system heat spreader assemblies and fabrication methods therefor
ST ASSEMBLY TEST SERVICES LTD21 citations92
US7575956B2Aug 18, 2009
Fabrication method for semiconductor package heat spreaders
ST ASSEMBLY TEST SERVICES LTD12 citations84
US7327025B2Feb 5, 2008
Heat spreader for thermally enhanced semiconductor package
ST ASSEMBLY TEST SERVICES LTD5 citations62
CAMACHO ZIGMUND RAMIREZ
2 patentsUS9406531B1Aug 2, 2016
Integrated circuit packaging system with photoimagable dielectric-defined trace and method of manufacture thereof
CAMACHO ZIGMUND RAMIREZ11 citations83
US9331003B1May 3, 2016
Integrated circuit packaging system with pre-molded leadframe and method of manufacture thereof
CAMACHO ZIGMUND RAMIREZ15 citations83
STATS CHIPPAC PTE LTD
2 patentsUS10446523B2Oct 15, 2019
Semiconductor device and method of forming wire studs as vertical interconnect in FO-WLP
STATS CHIPPAC PTE LTD5 citations82
US9679769B1Jun 13, 2017
Integrated circuit packaging system with photoimagable dielectric-defined trace and method of manufacture thereof
STATS CHIPPAC PTE LTD1 citations51