Inventor

HE YUE-SONG

US60 patents

⚠️ This page may combine multiple inventors who share the name “HE YUE-SONG”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

HE YUE-SONG

ADVANCED MICRO DEVICES INC

Use of high-K dielectric material for ONO and tunnel oxide to improve floating gate flash memory coupling

Method of fabricating an oxynitride-capped high dielectric constant interpolysilicon dielectric structure for a low voltage non-volatile memory

Process to improve read disturb for NAND flash memory devices

Structure for increasing drive current in a memory array and related method

2Bit/cell architecture for floating gate flash memory product and associated method

Method of fabricating a high dielectric constant interpolysilicon dielectric structure for a low voltage non-volatile memory

Nitridation assisted polysilicon sidewall protection in self-aligned shallow trench isolation

Method of reducing program disturbs in NAND type flash memory devices

Floating gate engineering to improve tunnel oxide reliability for flash memory devices

Barrier layer decreases nitrogen contamination of peripheral gate regions during tunnel oxide nitridation

Source side boron implanting and diffusing device architecture for deep sub 0.18 micron flash memory

Shallow trench isolation filled with thermal oxide

Performance in flash memory devices

Semiconductor isolation process to minimize weak oxide problems

Circuit and technique for accurately sensing low voltage flash memory devices

Virtual ground silicide bit line process for floating gate flash memory

Method for producing a shallow trench isolation filled with thermal oxide

Re-oxidation approach to improve peripheral gate oxide integrity in a tunnel nitride oxidation process

Semiconductor isolation process to minimize weak oxide problems

High density isolation using an implant as a polish stop

Ramped soft programming for control of erase voltage distributions in flash memory devices

Process to reduce post cycling program VT dispersion for NAND flash memory devices

Efficient and accurate sensing circuit and technique for low voltage flash memory devices

N-Gate/N-Substrate or P-Gate/P-Substrate capacitor to characterize polysilicon gate depletion evaluation

Method for reducing short channel effects in memory cells and related structure

Large angle implantation to prevent field turn-on under select gate transistor field oxide region for non-volatile memory devices

Heavy ion implant process to eliminate polystringers in high density type flash memory devices

Oxidation and etchback process for forming thick contact area on polysilicon layer in microelectronic structure

Flash memory device and a method of fabrication thereof

Semiconductor device having triple LDD structure and lower gate resistance formed with a single implant process

Method of fabricating semiconductor device having triple LDD structure and lower gate resistance formed with a single implant process

Nitrogen oxidation to reduce encroachment

Source side boron implant and drain side MDD implant for deep sub 0.18 micron flash memory

Method and system for eliminating post etch residues

Method and system for improving short channel effect on a floating gate device

Two-step source side implant for improving source resistance and short channel effect in deep sub-0.18μm flash memory technology

SPANSION LLC

Flash memory with high-K dielectric material between substrate and gate

Method for minimizing false detection of states in flash memory devices

Method for providing short channel effect control using a silicide VSS line

Memory array with memory cells having reduced short channel effects

INTEL CORP

Integrated circuits with programmable non-volatile resistive switch elements

Methods and circuitry for programming non-volatile resistive switches using varistors

Integrated circuits with complementary non-volatile resistive memory elements

PROMOS TECHNOLOGIES PTE LTD

Nonvolatile memories with laterally recessed charge-trapping dielectric

Integrated circuits with substrate protrusions, including (but not limited to) floating gate memories

SPANSION L L C

Methods and systems for reducing erase times in flash memory devices

LUAN HARRY S

One-time programmable memory and method for making the same

FASTOW RICHARD

Apparatus and method for source side implantation after spacer formation to reduce short channel effects in metal oxide semiconductor field effect transistors

ADANCED MICRO DEVICES INC

Double layer hard mask process to improve oxide quality for non-volatile flash memory products

PROMOS TECHNOLOIES PTE LTD

Integrated circuits with substrate protrusions, including (but not limited to) floating gate memories