Inventor

YEE GIN S

US18 patents

⚠️ This page may combine multiple inventors who share the name “YEE GIN S”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

YEE GIN S

SUN MICROSYSTEMS INC

Compensation technique to mitigate aging effects in integrated circuit components

On-chip temperature measurement technique

Negative bias temperature instability correction technique for delay locked loop and phase locked loop bias generators

Dual edge-triggered flip-flop design with asynchronous programmable reset

Deskewing global clock skew using localized DLLs

Automated shielding algorithm for dynamic circuits

Dual rail dynamic flip-flop with single evaluation path

Embedded integrated circuit aging sensor system

On-die thermal monitoring technique

Measuring skew using on-chip sampling

Clock divider for analysis of all clock edges

Stretching, shortening, and/or removing a clock cycle

Variation reduction technique for charge pump transistor aging

Clock frequency multiplier

IC analog debugging and calibration thereof

Method for synchronizing clock and data signals

ADVANCED MICRO DEVICES INC

Circuit and method for high impedance input/output termination in shut off mode and for negative signal swing

APPLE INC

Non-invasive on-chip power measurement technique