Inventor

SHISHIGUCHI SEIICHI

JP16 patents

⚠️ This page may combine multiple inventors who share the name “SHISHIGUCHI SEIICHI”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

NEC CORP

15 patents

US6372591B1Apr 16, 2002

Fabrication method of semiconductor device using ion implantation

NEC CORP67 citations96

US5821158AOct 13, 1998

Substrate surface treatment method capable of removing a spontaneous oxide film at a relatively low temperature

NEC CORP65 citations96

US5798544AAug 25, 1998

Semiconductor memory device having trench isolation regions and bit lines formed thereover

NEC CORP105 citations96

US5972785AOct 26, 1999

Method for manufacturing a semiconductor device having a refractory metal silicide layer

NEC CORP27 citations92

US5951774ASep 14, 1999

Cold-wall operated vapor-phase growth system

NEC CORP22 citations92

US5543347AAug 6, 1996

Method of forming silicon film having jagged surface

NEC CORP24 citations92

US6017823AJan 25, 2000

Method of forming a MOS field effect transistor with improved gate side wall insulation films

NEC CORP48 citations91

US4992301AFeb 12, 1991

Chemical vapor deposition apparatus for obtaining high quality epitaxial layer with uniform film thickness

NEC CORP52 citations91

US6190976B1Feb 20, 2001

Removal of metal contaminants from the surface of a silicon substrate by diffusion into the bulk

NEC CORP1 citations50

TOKYO ELECTRON LTD

1 patent

US5783257AJul 21, 1998

Method for forming doped polysilicon films

TOKYO ELECTRON LTD7 citations71

SHISHIGUCHI SEIICHI

NEC CORP

Fabrication method of semiconductor device using ion implantation

Substrate surface treatment method capable of removing a spontaneous oxide film at a relatively low temperature

Semiconductor memory device having trench isolation regions and bit lines formed thereover

Method for manufacturing a semiconductor device having a refractory metal silicide layer

Cold-wall operated vapor-phase growth system

Method of forming silicon film having jagged surface

Method of forming a MOS field effect transistor with improved gate side wall insulation films

Chemical vapor deposition apparatus for obtaining high quality epitaxial layer with uniform film thickness

Fabrication method of semiconductor device using selective epitaxial growth

Silicon semiconductor substrate and method of fabricating the same

Method of fabricating poly-silicon resistor

Method for manufacturing a semiconductor device

Method for forming capacitor electrode having jagged surface

Method for producing silicon film to bury contact hole

Removal of metal contaminants from the surface of a silicon substrate by diffusion into the bulk

TOKYO ELECTRON LTD

Method for forming doped polysilicon films