Inventor
KRISHNAMURTHY SRIDHAR
US31 patents
⚠️ This page may combine multiple inventors who share the name “KRISHNAMURTHY SRIDHAR”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
XILINX INC
21 patentsUS5963050AOct 5, 1999
Configurable logic element with fast feedback paths
XILINX INC129 citations98
US5942913AAug 24, 1999
FPGA repeatable interconnect structure with bidirectional and unidirectional interconnect lines
XILINX INC91 citations98
US5936424AAug 10, 1999
High speed bus with tree structure for selecting bus driver
XILINX INC128 citations98
US7111214B1Sep 19, 2006
Circuits and methods for testing programmable logic devices using lookup tables and carry chains
XILINX INC20 citations92
US5847580ADec 8, 1998
High speed bidirectional bus with multiplexers
XILINX INC32 citations92
US6754760B1Jun 22, 2004
Programmable interface for a configurable system bus
XILINX INC24 citations90
US7478356B1Jan 13, 2009
Timing driven logic block configuration
XILINX INC16 citations89
US8010923B1Aug 30, 2011
Latch based optimization during implementation of circuit designs for programmable logic devices
XILINX INC7 citations84
US7610573B1Oct 27, 2009
Implementation of alternate solutions in technology mapping and placement
XILINX INC11 citations83
US7058919B1Jun 6, 2006
Methods of generating test designs for testing specific routing resources in programmable logic devices
XILINX INC15 citations83
US10068048B1Sep 4, 2018
Generating clock trees for a circuit design
XILINX INC12 citations82
US6944809B2Sep 13, 2005
Methods of resource optimization in programmable logic devices to reduce test time
XILINX INC13 citations82
US7926016B1Apr 12, 2011
Timing driven logic block configuration
XILINX INC10 citations81
US5844424ADec 1, 1998
Programmably bidirectional buffered interconnect circuit
XILINX INC16 citations74
US7249335B1Jul 24, 2007
Methods of routing programmable logic devices to minimize programming time
XILINX INC9 citations73
US10366201B1Jul 30, 2019
Timing closure of circuit designs for integrated circuits
XILINX INC5 citations72
US7784006B1Aug 24, 2010
Method and apparatus for directed physical implementation of a circuit design for an integrated circuit
XILINX INC7 citations71
US10042971B1Aug 7, 2018
Placement and routing of clock signals for a circuit design
XILINX INC5 citations69
US9330220B1May 3, 2016
Clock region partitioning and clock routing
XILINX INC4 citations68
US7143384B1Nov 28, 2006
Methods of routing programmable logic devices to minimize programming time
XILINX INC4 citations62
US6910002B1Jun 21, 2005
Method and apparatus for specifying addressability and bus connections in a logic design
XILINX INC0 citations50
TRISCEND CORP
3 patentsUS6467009B1Oct 15, 2002
Configurable processor system unit
TRISCEND CORP294 citations97
US6661812B1Dec 9, 2003
Bidirectional bus for use as an interconnect routing resource
TRISCEND CORP6 citations62
US6658547B1Dec 2, 2003
Method and apparatus for specifying address offsets and alignment in logic design
TRISCEND CORP6 citations61