Inventor

GAILLARDON PIERRE-EMMANUEL JULIEN MARC

CH5 patents

⚠️ This page may combine multiple inventors who share the name “GAILLARDON PIERRE-EMMANUEL JULIEN MARC”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

ECOLE POLYTECHNIQUE FED DE LAUSANNE (EPFL)

2 patents

US9412940B2Aug 9, 2016

Resistive switching element and use thereof

ECOLE POLYTECHNIQUE FED DE LAUSANNE (EPFL)26 citations88

US9685959B2Jun 20, 2017

Method for speeding up boolean satisfiability

ECOLE POLYTECHNIQUE FED DE LAUSANNE (EPFL)0 citations35

ECOLE POLYTECHNIQUE FED LAUSANNE EPFL

2 patents

US9971862B2May 15, 2018

Pattern-based FPGA logic block and clustering algorithm

ECOLE POLYTECHNIQUE FED LAUSANNE EPFL1 citations47

US10380309B2Aug 13, 2019

Boolean logic optimization in majority-inverter graphs

ECOLE POLYTECHNIQUE FED LAUSANNE EPFL0 citations35

ECOLE POLYTECH

1 patent

US9130568B2Sep 8, 2015

Controllable polarity FET based arithmetic and differential logic

ECOLE POLYTECH1 citations48