Inventor · disambiguated record
Charudhattan Nagarajan
Also filed as: NAGARAJAN CHARUDHATTAN
8 granted patents·1 pending application·12 citations·filing 2006–2018
80Inventor score
Top patents by PatentIndex Score
9 records- 0186US9543935B1Programmable delay circuit including hybrid fin field effect transistors (finFETs)IBM·Filed 2015·Granted Jan 10, 2017·5 cites·9 claims
- 0279US9734268B2Slack redistribution for additional power recoveryIBM·Filed 2015·Granted Aug 15, 2017·3 cites·11 claims
- 0377US10678981B2Priority based circuit synthesisIBM·Filed 2018·Granted Jun 9, 2020·2 cites·18 claims
- 0465US9614507B2Programmable delay circuit including hybrid fin field effect transistors (finFETs)IBM·Filed 2015·Granted Apr 4, 2017·1 cites·9 claims
- 0560US8875084B1Optimal spare latch selection for metal-only ECOsIBM·Filed 2013·Granted Oct 28, 2014·1 cites·18 claims
- 0653US9985616B2Programmable delay circuit including hybrid fin field effect transistors (finFETs)IBM·Filed 2017·Granted May 29, 2018·0 cites·7 claims
- 0750US10133840B2Priority based circuit synthesisIBM·Filed 2015·Granted Nov 20, 2018·0 cites·20 claims
- 0850US9684751B2Slack redistribution for additional power recoveryIBM·Filed 2015·Granted Jun 20, 2017·0 cites·9 claims
- 0939US2008022250A1Chip finishing using a library based approachNAGARAJAN CHARUDHATTAN·Filed 2006·Application pending·0 cites
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →