P

Inventor

LAVOIE CHRISTIAN

US176 patents
⚠️ This page may combine multiple inventors who share the name “LAVOIE CHRISTIAN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

IBM

39 patents
US6645861B2Nov 11, 2003

Self-aligned silicide process for silicon sidewall source and drain contacts

IBM71 citations96
US6555880B2Apr 29, 2003

Self-aligned silicide process utilizing ion implants for reduced silicon consumption and control of the silicide formation temperature and structure formed thereby

IBM54 citations96
US6503833B1Jan 7, 2003

Self-aligned silicide (salicide) process for strained silicon MOSFET ON SiGe and structure formed thereby

IBM83 citations95
US6440851B1Aug 27, 2002

Method and structure for controlling the interface roughness of cobalt disilicide

IBM57 citations95
US9520547B2Dec 13, 2016

Chip mode isolation and cross-talk reduction through buried metal layers and through-vias

IBM28 citations94
US9397283B2Jul 19, 2016

Chip mode isolation and cross-talk reduction through buried metal layers and through-vias

IBM24 citations94
US6323130B1Nov 27, 2001

Method for self-aligned formation of silicide contacts using metal silicon alloys for limited silicon consumption and for reduction of bridging

IBM59 citations94
US8878311B2Nov 4, 2014

Integrated circuit having raised source drains devices with reduced silicide contact resistance and methods to fabricate same

IBM20 citations93
US8492854B1Jul 23, 2013

Integrated circuit having raised source drains devices with reduced silicide contact resistance and methods to fabricate same

IBM19 citations93
US7491643B2Feb 17, 2009

Method and structure for reducing contact resistance between silicide contact and overlying metallization

IBM16 citations93
US7129548B2Oct 31, 2006

MOSFET structure with multiple self-aligned silicide contacts

IBM20 citations93
US6448131B1Sep 10, 2002

Method for increasing the capacitance of a trench capacitor

IBM48 citations93
US7449782B2Nov 11, 2008

Self-aligned metal to form contacts to Ge containing substrates and structure formed thereby

IBM16 citations92
US7384868B2Jun 10, 2008

Reduction of silicide formation temperature on SiGe containing substrates

IBM18 citations92
US7122472B2Oct 17, 2006

Method for forming self-aligned dual fully silicided gates in CMOS devices

IBM23 citations92
US7074684B2Jul 11, 2006

Elevated source drain disposable spacer CMOS

IBM20 citations92
US7067368B1Jun 27, 2006

Method for forming self-aligned dual salicide in CMOS technologies

IBM17 citations92
US6989322B2Jan 24, 2006

Method of forming ultra-thin silicidation-stop extensions in mosfet devices

IBM27 citations92
US6987050B2Jan 17, 2006

Self-aligned silicide (salicide) process for low resistivity contacts to thin film silicon-on-insulator and bulk MOSFETS and for shallow junctions

IBM21 citations92
US6753606B2Jun 22, 2004

Method and structure for reduction of contact resistance of metal silicides using a metal-germanium alloy

IBM13 citations92
US6716708B2Apr 6, 2004

Self-aligned silicide process utilizing ion implants for reduced silicon consumption and control of the silicide formation temperature and structure formed thereby

IBM20 citations92
US6690072B2Feb 10, 2004

Method and structure for ultra-low contact resistance CMOS formed by vertically self-aligned COSI2 on raised source drain Si/SiGe device

IBM16 citations92
US6444578B1Sep 3, 2002

Self-aligned silicide process for reduction of Si consumption in shallow junction and thin SOI electronic devices

IBM50 citations92
US6331486B1Dec 18, 2001

Method and structure for reduction of contact resistance of metal silicides using a metal-germanium alloy

IBM21 citations92
US7598516B2Oct 6, 2009

Self-aligned process for nanotube/nanowire FETs

IBM24 citations91
US6413859B1Jul 2, 2002

Method and structure for retarding high temperature agglomeration of silicides using alloys

IBM26 citations91
US6878624B1Apr 12, 2005

Pre-anneal of CoSi, to prevent formation of amorphous layer between Ti-O-N and CoSi

IBM20 citations88
US9093425B1Jul 28, 2015

Self-aligned liner formed on metal semiconductor alloy contacts

IBM6 citations84
US9041151B2May 26, 2015

Fin eFuse formed by trench silicide process

IBM10 citations84
US9018714B2Apr 28, 2015

Integrated circuit having raised source drains devices with reduced silicide contact resistance and methods to fabricate same

IBM6 citations84
US8349716B2Jan 8, 2013

Semiconductor device with reduced junction leakage and an associated method of forming such a semiconductor device

IBM7 citations84
US8030154B1Oct 4, 2011

Method for forming a protection layer over metal semiconductor contact and structure formed thereon

IBM15 citations84
US7927895B1Apr 19, 2011

Varying capacitance voltage contrast structures to determine defect resistance

IBM9 citations84
US7923838B2Apr 12, 2011

Method and structure for reducing contact resistance between silicide contact and overlying metallization

IBM12 citations84
US7737032B2Jun 15, 2010

MOSFET structure with multiple self-aligned silicide contacts

IBM8 citations84
US7679164B2Mar 16, 2010

Bipolar transistor with silicided sub-collector

IBM9 citations84
US6972250B2Dec 6, 2005

Method and structure for ultra-low contact resistance CMOS formed by vertically self-aligned CoSi2 on raised source drain Si/SiGe device

IBM16 citations84
US6927117B2Aug 9, 2005

Method for integration of silicide contacts and silicide gate metals

IBM15 citations84
US8614107B2Dec 24, 2013

Liner-free tungsten contact

IBM8 citations83

GLOBALFOUNDRIES INC

4 patents

(unassigned)

2 patents

LAVOIE CHRISTIAN

2 patents

AVOURIS PHAEDON

1 patent

GUILLORN MICHAEL A

1 patent

BOL AGEETH A

1 patent

Showing the top 50 of 176 patents by PatentIndex Score.