Inventor
LIFF SHAWNA
US47 patents
⚠️ This page may combine multiple inventors who share the name “LIFF SHAWNA”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
INTEL CORP
46 patentsUS10943851B1Mar 9, 2021
Reconstituted wafer assembly
INTEL CORP18 citations86
US11270947B2Mar 8, 2022
Composite interposer structure and method of providing same
INTEL CORP5 citations84
US11094672B2Aug 17, 2021
Composite IC chips including a chiplet embedded within metallization layers of a host IC chip
INTEL CORP5 citations84
US11049791B1Jun 29, 2021
Heat spreading layer integrated within a composite IC die structure and methods of forming the same
INTEL CORP7 citations84
US9832863B2Nov 28, 2017
Method of fabricating a stretchable computing device
INTEL CORP10 citations84
US11183477B2Nov 23, 2021
Mixed hybrid bonding structures and methods of forming the same
INTEL CORP6 citations83
US11133263B2Sep 28, 2021
High-density interconnects for integrated circuit packages
INTEL CORP6 citations83
US12224261B2Feb 11, 2025
Mixed hybrid bonding structures and methods of forming the same
INTEL CORP2 citations73
US11569428B2Jan 31, 2023
Superconducting qubit device packages
INTEL CORP2 citations73
US11394094B2Jul 19, 2022
Waveguide connector having a curved array of waveguides configured to connect a package to excitation elements
INTEL CORP2 citations73
US11309619B2Apr 19, 2022
Waveguide coupling systems and methods
INTEL CORP2 citations73
US10852495B2Dec 1, 2020
Microelectronic package communication using radio interfaces connected through wiring
INTEL CORP2 citations73
US10249515B2Apr 2, 2019
Electronic device package
INTEL CORP2 citations73
US9942980B2Apr 10, 2018
Wavy interconnect for bendable and stretchable devices
INTEL CORP5 citations73
US11824018B2Nov 21, 2023
Heterogeneous nested interposer package for IC chips
INTEL CORP3 citations72
US11735533B2Aug 22, 2023
Heterogeneous nested interposer package for IC chips
INTEL CORP2 citations72
US11387175B2Jul 12, 2022
Interposer package-on-package (PoP) with solder array thermal contacts
INTEL CORP6 citations72
US11189585B2Nov 30, 2021
Selective recess of interconnects for probing hybrid bond devices
INTEL CORP3 citations72
US10998272B2May 4, 2021
Organic interposers for integrated circuit packages
INTEL CORP2 citations72
US11205630B2Dec 21, 2021
Vias in composite IC chip structures
INTEL CORP3 citations71
US11112841B2Sep 7, 2021
5G mmWave cooling through PCB
INTEL CORP3 citations69
US9635764B2Apr 25, 2017
Integrated circuit and method that utilize a shape memory material
INTEL CORP4 citations68
US12266840B2Apr 1, 2025
Waveguide interconnects for semiconductor packages and related methods
INTEL CORP1 citations64
US12300579B2May 13, 2025
Liquid cooled interposer for integrated circuit stack
INTEL CORP0 citations63
US11525970B2Dec 13, 2022
Microelectronic package communication using radio interfaces connected through wiring
INTEL CORP0 citations63
US12424543B2Sep 23, 2025
Selective interconnects in back-end-of-line metallization stacks of integrated circuitry
INTEL CORP0 citations62
US12362284B2Jul 15, 2025
Composite interposer structure and method of providing same
INTEL CORP0 citations62
US12327775B2Jun 10, 2025
Thermal performance in hybrid bonded 3D die stacks
INTEL CORP0 citations62
US12205902B2Jan 21, 2025
High-density interconnects for integrated circuit packages
INTEL CORP0 citations62
US12014990B2Jun 18, 2024
Composite interposer structure and method of providing same
INTEL CORP0 citations62
US11749649B2Sep 5, 2023
Composite IC chips including a chiplet embedded within metallization layers of a host IC chip
INTEL CORP0 citations62
US11664303B2May 30, 2023
Interconnection structure fabrication using grayscale lithography
INTEL CORP0 citations62
US11581238B2Feb 14, 2023
Heat spreading layer integrated within a composite IC die structure and methods of forming the same
INTEL CORP0 citations62
US11101205B2Aug 24, 2021
Interconnection structure fabrication using grayscale lithography
INTEL CORP0 citations62
US10998302B2May 4, 2021
Packaged device with a chiplet comprising memory resources
INTEL CORP0 citations62
US12315794B2May 27, 2025
Skip level vias in metallization layers for integrated circuit devices
INTEL CORP0 citations61
US12288746B2Apr 29, 2025
Skip level vias in metallization layers for integrated circuit devices
INTEL CORP0 citations61
US12272656B2Apr 8, 2025
Heterogeneous nested interposer package for IC chips
INTEL CORP0 citations61
US12199048B2Jan 14, 2025
Heterogeneous nested interposer package for IC chips
INTEL CORP0 citations61
US11694986B2Jul 4, 2023
Vias in composite IC chip structures
INTEL CORP0 citations61
US11735551B2Aug 22, 2023
Aligned core balls for interconnect joint stability
INTEL CORP0 citations59
US12456702B2Oct 28, 2025
Device, method and system to mitigate stress on hybrid bonds in a multi-tier arrangement of chiplets
INTEL CORP0 citations52
US11830831B2Nov 28, 2023
Semiconductor package including a modular side radiating waveguide launcher
INTEL CORP0 citations52
US10090259B2Oct 2, 2018
Non-rectangular electronic device components
INTEL CORP0 citations52
US11460499B2Oct 4, 2022
Dual sided thermal management solutions for integrated circuit packages
INTEL CORP0 citations51
US9820384B2Nov 14, 2017
Flexible electronic assembly method
INTEL CORP0 citations51