Inventor
YIU HO-YIN
TW28 patents
⚠️ This page may combine multiple inventors who share the name “YIU HO-YIN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
XINTEC INC
15 patentsUS10157875B2Dec 18, 2018
Chip package and method for forming the same
XINTEC INC4 citations73
US10056419B2Aug 21, 2018
Chip package having chip connected to sensing device with redistribution layer in insulator layer
XINTEC INC4 citations73
US9935148B2Apr 3, 2018
Method for forming chip package having chip connected to sensing device with redistribution layer in insulator layer
XINTEC INC4 citations73
US9640405B2May 2, 2017
Chip package having a laser stop structure
XINTEC INC2 citations72
US9543233B2Jan 10, 2017
Chip package having a dual through hole redistribution layer structure
XINTEC INC3 citations72
US9437478B2Sep 6, 2016
Chip package and method for forming the same
XINTEC INC2 citations62
US9406578B2Aug 2, 2016
Chip package having extended depression for electrical connection and method of manufacturing the same
XINTEC INC2 citations62
US9812413B2Nov 7, 2017
Chip module and method for forming the same
XINTEC INC0 citations52
US9831185B2Nov 28, 2017
Chip package and fabrication method thereof
XINTEC INC0 citations51
US9780050B2Oct 3, 2017
Method of fabricating chip package with laser
XINTEC INC0 citations51
US9768067B2Sep 19, 2017
Chip package and manufacturing method thereof
XINTEC INC0 citations51
US9853074B2Dec 26, 2017
Chip scale sensing chip package
XINTEC INC0 citations46
US12424567B2Sep 23, 2025
Chip package and manufacturing method thereof
XINTEC INC0 citations45
US9966358B2May 8, 2018
Chip package
XINTEC INC0 citations41
US9721911B2Aug 1, 2017
Chip package and manufacturing method thereof
XINTEC INC0 citations41
TAIWAN SEMICONDUCTOR MFG
8 patentsUS6284557B1Sep 4, 2001
Optical sensor by using tunneling diode
TAIWAN SEMICONDUCTOR MFG34 citations90
US5942800AAug 24, 1999
Stress buffered bond pad and method of making
TAIWAN SEMICONDUCTOR MFG25 citations90
US7323784B2Jan 29, 2008
Top via pattern for bond pad structure
TAIWAN SEMICONDUCTOR MFG14 citations82
US6258706B1Jul 10, 2001
Method for fabricating a stress buffered bond pad
TAIWAN SEMICONDUCTOR MFG8 citations69
US6274397B1Aug 14, 2001
Method to preserve the testing chip for package's quality
TAIWAN SEMICONDUCTOR MFG5 citations62
US6693317B2Feb 17, 2004
Optical sensor by using tunneling diode
TAIWAN SEMICONDUCTOR MFG0 citations50
US6582981B2Jun 24, 2003
Method of using a tunneling diode in optical sensing devices
TAIWAN SEMICONDUCTOR MFG0 citations50
US6180964B1Jan 30, 2001
Low leakage wire bond pad structure for integrated circuits
TAIWAN SEMICONDUCTOR MFG1 citations46