Inventor
ZIER STEVEN J
US15 patents
⚠️ This page may combine multiple inventors who share the name “ZIER STEVEN J”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
IBM
12 patentsUS7268624B2Sep 11, 2007
Differential amplifier offset voltage minimization independently from common mode voltage adjustment
IBM20 citations91
US6937054B2Aug 30, 2005
Programmable peaking receiver and method
IBM34 citations90
US4746817AMay 24, 1988
BIFET logic circuit
IBM29 citations89
US7486114B2Feb 3, 2009
Signal detector with calibration circuit arrangement
IBM17 citations84
US7394283B2Jul 1, 2008
CML to CMOS signal converter
IBM11 citations83
US5166552ANov 24, 1992
Multi-emitter bicmos logic circuit family with superior performance
IBM7 citations70
US7409019B2Aug 5, 2008
High Speed Multi-Mode Receiver with adaptive receiver equalization and controllable transmitter pre-distortion
IBM2 citations63
US7205830B2Apr 17, 2007
Analog MOS circuits having reduced voltage stress
IBM5 citations62
US7694243B2Apr 6, 2010
Avoiding device stressing
IBM3 citations61
US7660350B2Feb 9, 2010
High-speed multi-mode receiver
IBM5 citations61
US7332956B2Feb 19, 2008
Method to avoid device stressing
IBM1 citations51
US7265696B2Sep 4, 2007
Methods and apparatus for testing an integrated circuit
IBM0 citations51