P

Inventor

NODINE MARK H

US8 patents
⚠️ This page may combine multiple inventors who share the name “NODINE MARK H”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

MOTOROLA INC

2 patents
US6106567AAug 22, 2000

Circuit design verification tool and method therefor using maxwell's equations

MOTOROLA INC23 citations91
US5966306AOct 12, 1999

Method for verifying protocol conformance of an electrical interface

MOTOROLA INC29 citations87

NODINE MARK H

2 patents
US8443319B2May 14, 2013

Method for preparing re-architected designs for sequential equivalence checking

NODINE MARK H2 citations57
US8310268B2Nov 13, 2012

Generating test benches for pre-silicon validation of retimed complex IC designs against a reference design

NODINE MARK H2 citations57

APPLE INC

2 patents
US9053265B2Jun 9, 2015

Generating test benches for pre-silicon validation of retimed complex IC designs against a reference design

APPLE INC0 citations49
US7956636B2Jun 7, 2011

Generating test benches for pre-silicon validation of retimed complex IC designs against a reference design

APPLE INC0 citations49

YEUNG RAYMOND C

1 patent
US8429580B2Apr 23, 2013

Method for preparing for and formally verifying a modified integrated circuit design

YEUNG RAYMOND C2 citations53

SHEELEY NATHAN FRANCIS

1 patent
US8448107B2May 21, 2013

Method for piecewise hierarchical sequential verification

SHEELEY NATHAN FRANCIS1 citations35