Inventor
MEYERS JOHN G
US15 patents
⚠️ This page may combine multiple inventors who share the name “MEYERS JOHN G”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
INTEL CORP
14 patentsUS9871007B2Jan 16, 2018
Packaged integrated circuit device with cantilever structure
INTEL CORP20 citations92
US10910347B2Feb 2, 2021
Method, apparatus and system to interconnect packaged integrated circuit dies
INTEL CORP10 citations84
US6927497B2Aug 9, 2005
Multi-die semiconductor package
INTEL CORP14 citations82
US10396055B2Aug 27, 2019
Method, apparatus and system to interconnect packaged integrated circuit dies
INTEL CORP2 citations72
US7498201B2Mar 3, 2009
Method of forming a multi-die semiconductor package
INTEL CORP5 citations72
US7533457B2May 19, 2009
Packaging method for circuit board
INTEL CORP7 citations71
US11552051B2Jan 10, 2023
Electronic device package
INTEL CORP1 citations61
US12068283B2Aug 20, 2024
Die stack with cascade and vertical connections
INTEL CORP0 citations59
US11171114B2Nov 9, 2021
Die stack with cascade and vertical connections
INTEL CORP0 citations59
US10964682B2Mar 30, 2021
Data storage system using wafer-level packaging
INTEL CORP0 citations56
US11901274B2Feb 13, 2024
Packaged integrated circuit device with recess structure
INTEL CORP0 citations51
US11817438B2Nov 14, 2023
System in package with interconnected modules
INTEL CORP0 citations51
US10490516B2Nov 26, 2019
Packaged integrated circuit device with cantilever structure
INTEL CORP0 citations50
US10872832B2Dec 22, 2020
Pre-molded active IC of passive components to miniaturize system in package
INTEL CORP0 citations36