Inventor
WAKABAYASHI HITOSHI
JP23 patents
⚠️ This page may combine multiple inventors who share the name “WAKABAYASHI HITOSHI”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
NEC CORP
10 patentsUS7719043B2May 18, 2010
Semiconductor device with fin-type field effect transistor and manufacturing method thereof.
NEC CORP64 citations97
US6483151B2Nov 19, 2002
Semiconductor device and method of manufacturing the same
NEC CORP90 citations97
US7701018B2Apr 20, 2010
Semiconductor device and method for manufacturing same
NEC CORP45 citations92
US7612416B2Nov 3, 2009
Semiconductor device having a conductive portion below an interlayer insulating film and method for producing the same
NEC CORP36 citations92
US6933569B2Aug 23, 2005
Soi mosfet
NEC CORP24 citations91
US5593923AJan 14, 1997
Method of fabricating semiconductor device having refractory metal silicide layer on impurity region using damage implant and single step anneal
NEC CORP20 citations90
US7830703B2Nov 9, 2010
Semiconductor device and manufacturing method thereof
NEC CORP13 citations84
US6121120ASep 19, 2000
Method for manufacturing semiconductor device capable of flattening surface of selectively-grown silicon layer
NEC CORP6 citations63
US6916695B2Jul 12, 2005
Semiconductor device and method of manufacturing the same
NEC CORP5 citations62
US7723808B2May 25, 2010
Semiconductor device and method of manufacturing semiconductor device
NEC CORP6 citations61
SONY CORP
8 patentsUS4069394AJan 17, 1978
Stereophonic sound reproduction system
SONY CORP46 citations92
US8384167B2Feb 26, 2013
Semiconductor device with field effect transistor and manufacturing method thereof
SONY CORP8 citations84
US9337305B2May 10, 2016
Semiconductor device having curved gate electrode aligned with curved side-wall insulating film and stress-introducing layer between channel region and source and drain regions
SONY CORP6 citations83
US10854751B2Dec 1, 2020
Semiconductor device having curved gate electrode aligned with curved side-wall insulating film and stress-introducing layer between channel region and source and drain regions
SONY CORP0 citations51
US10535769B2Jan 14, 2020
Semiconductor device having curved gate electrode aligned with curved side-wall insulating film and stress-introducing layer between channel region and source and drain regions
SONY CORP0 citations51
US10269961B2Apr 23, 2019
Semiconductor device having curved gate electrode aligned with curved side-wall insulating film and stress-introducing layer between channel region and source and drain regions
SONY CORP0 citations51
US9947790B2Apr 17, 2018
Semiconductor device having curved gate electrode aligned with curved side-wall insulating film and stress-introducing layer between channel region and source and drain regions
SONY CORP0 citations51
US9601622B2Mar 21, 2017
Semiconductor device having curved gate electrode aligned with curved side-wall insulating film and stress-introducing layer between channel region and source and drain regions
SONY CORP0 citations51