Inventor

MOIR MARK S

US99 patents

⚠️ This page may combine multiple inventors who share the name “MOIR MARK S”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

MOIR MARK S

SUN MICROSYSTEMS INC

Hybrid software/hardware transactional memory

Method and apparatus for releasing memory locations during transactional execution

Technique to allow a first transaction to wait on condition that affects its working set

Controlling contention via transactional timers among conflicting transactions issued by processors operating in insistent or polite mode

Avoiding locks by transactionally executing critical sections

Software transactional memory for dynamically sizable shared data structures

Lock free reference counting

Lock-free implementation of concurrent shared object with dynamic node allocation and distinguishing pointer value

Efficient non-blocking k-compare-single-swap operation

Selectively unmarking load-marked cache lines during transactional program execution

Concurrent shared object implemented using a linked-list with amortized node allocation

System and method for executing transactions

Shared synchronized skip-list data structure and technique employing linearizable operations

Selectively unmarking load-marked cache lines during transactional program execution

Single-word lock-free reference counting

Lock-free implementation of dynamic-sized shared data structure

Non-blocking memory management mechanism for supporting dynamic-sized data structures

Breakpoints in a transactional memory-based representation of code

Conditional synchronization mechanisms allowing multiple store operations to become visible while a flagged memory location is owned and remains unchanged

Space-adaptive lock-free queue using pointer-sized single-target synchronization

Space-adaptive lock-free free-list using pointer-sized single-target synchronization

ORACLE AMERICA INC

System and method for supporting phased transactional memory modes

Replay debugging

Read sharing using global conflict indication and semi-transparent reading in a transactional memory space

Quickly reacquirable locks

Composite abortable locks

System and method for supporting multiple alternative methods for executing transactions

Delayed breakpoints

Coordinating accesses to shared objects using transactional memory mechanisms and non-transactional software mechanisms

Method and system for implementing a concurrent set of objects

Space-and time-adaptive nonblocking algorithms

MOIR MARK S

Using transactional memory with early release to implement non-blocking dynamic-sized data structure

System and method for performing incremental register checkpointing in transactional memory

System and method for optimizing a code section by forcing a code section to be executed atomically

Obstruction-free data structures and mechanisms with separable and/or substitutable contention management mechanisms

System and method for executing a transaction using parallel co-transactions

ORACLE INT CORP

Sharded permissioned distributed ledgers

Supporting targeted stores in a shared-memory multiprocessor system

System and method for implementing NUMA-aware statistics counters

Sharded permissioned distributed ledgers

DICE DAVID

Concurrent object management

System and method for managing contention in transactional memory using global execution data

System and method for mitigating the impact of branch misprediction when exiting spin loops

System and method for reducing serialization in transactional memory using gang release of blocked threads

NUSSBAUM DANIEL S

Advice-based feedback for transactional execution

Facilitating transactional execution through feedback about misspeculation

GOODMAN JAMES R

System and method for implementing nonblocking zero-indirection transactional memory

VICK CHRISTOPHER A

Facilitating gated stores without data bypass

LEV YOSEF

Method and apparatus for improving transactional memory interactions by tracking object visibility

DRAGOJEVIC ALEKSANDAR

System and method for performing memory management using hardware transactions