Inventor

CHOU GERCHIH

US48 patents

⚠️ This page may combine multiple inventors who share the name “CHOU GERCHIH”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

CHOU GERCHIH

REALTEK SEMICONDUCTOR CORP

Fractional-N frequency synthesizer

Adaptive equalization system for a signal receiver

Memory system and memory access interface device thereof

DDR SDRAM signal calibration device and method

Memory signal phase difference calibration circuit and method

Switch-capacitor loop filter for phase lock loops

Charge pump circuit with regulated current output

Variable delay clock synthesizer

Variable delay clock synthesizer

DDR4 memory I/O driver

Dynamically accelerated operational amplifier and method thereof

Integrated front-end passive equalizer and method thereof

Delay lock clock synthesizer and method thereof

Noise shaping comparator based switch capacitor circuit and method thereof

Variable delay clock circuit and method thereof

Adaptive equalization system for a signal receiver

Memory access interface device including phase and duty cycle adjusting circuits for memory access signals

Memory system and memory physical layer interface circuit

Methods and apparatuses of serial link transceiver without external reference clock

DDR SDRAM physical layer interface circuit and DDR SDRAM control device

Control circuit, sampling circuit for synchronous dynamic random-access memory, method of reading procedure and calibration thereof

On-die-termination circuit and control method for of the same

Memory controller and memory data receiving method for generate better sampling clock signal

Method and apparatus for charge leakage compensation for charge pump

Fractional-N frequency synthesizer

Dynamically compensated operational amplifier

Adaptive equalization system for a signal receiver

Error cancelling comparator based switch capacitor circuit and method thereof

Detection circuit and detection method

Method of foreground auto-calibrating data reception window and related device

Memory system and memory access interface device thereof

Physical layer circuit, write leveling training circuit and method for calibrating access control signal transmitted to memory device

Electronic device, data strobe gate signal generator circuit and data strobe gate signal generating method

Memory control device for repeating data during a preamble signal or a postamble signal and memory control method

Frequency adjusting apparatus and frequency adjusting method

Two-capacitor-based filter design method and two-capacitor-based filter

Memory controller with adjustable impedance for output terminal

CUBE INC I

Crossbar switch with input/output buffers having multiplexed control inputs

Programmable port for crossbar switch

Apparatus for programmable signal switching

Crosspoint switch with bank-switched memory

INFINEON TECHNOLOGIES CORP

FIR filter architecture for 100Base-TX receiver

Automatic gain control for communication receivers

Power efficient line driver with high performance echo cancellation for 1000BASE-T

CHOU GERCHIH

Integrated front-end passive equalizer and method thereof

Integrated front-end passive equalizer and method thereof

LIN CHIA-LIANG

All digital serial link receiver with low jitter clock regeneration and method thereof

KUAN CHI-KUNG

Method and apparatus of automatic power control for burst mode laser transmitter