Inventor
JONES ERIN CATHERINE
US5 patents
Patents
5 patentsUS6057212AMay 2, 2000
Method for making bonded metal back-plane substrates
IBM388 citations98
US7453123B2Nov 18, 2008
Self-aligned planar double-gate transistor structure
IBM15 citations92
US7205185B2Apr 17, 2007
Self-aligned planar double-gate process by self-aligned oxidation
IBM26 citations92
US6281551B1Aug 28, 2001
Back-plane for semiconductor device
IBM6 citations72
US7960790B2Jun 14, 2011
Self-aligned planar double-gate transistor structure
IBM0 citations48