Inventor
REED DOUGLAS R
US36 patents
⚠️ This page may combine multiple inventors who share the name “REED DOUGLAS R”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
VIA ALLIANCE SEMICONDUCTOR CO LTD
27 patentsUS9892803B2Feb 13, 2018
Cache management request fusing
VIA ALLIANCE SEMICONDUCTOR CO LTD47 citations98
US10430706B2Oct 1, 2019
Processor with memory array operable as either last level cache slice or neural network unit memory
VIA ALLIANCE SEMICONDUCTOR CO LTD26 citations94
US9811468B2Nov 7, 2017
Set associative cache memory with heterogeneous replacement policy
VIA ALLIANCE SEMICONDUCTOR CO LTD43 citations94
US10664751B2May 26, 2020
Processor with memory array operable as either cache memory or neural network unit memory
VIA ALLIANCE SEMICONDUCTOR CO LTD11 citations86
US10423876B2Sep 24, 2019
Processor with memory array operable as either victim cache or neural network unit memory
VIA ALLIANCE SEMICONDUCTOR CO LTD10 citations84
US9972375B2May 15, 2018
Sanitize-aware DRAM controller
VIA ALLIANCE SEMICONDUCTOR CO LTD8 citations84
US10719434B2Jul 21, 2020
Multi-mode set associative cache memory dynamically configurable to selectively allocate into all or a subset of its ways depending on the mode
VIA ALLIANCE SEMICONDUCTOR CO LTD2 citations73
US10387318B2Aug 20, 2019
Prefetching with level of aggressiveness based on effectiveness by memory access type
VIA ALLIANCE SEMICONDUCTOR CO LTD2 citations73
US10127041B2Nov 13, 2018
Compiler system for a processor with an expandable instruction set architecture for dynamically configuring execution resources
VIA ALLIANCE SEMICONDUCTOR CO LTD2 citations73
US9910785B2Mar 6, 2018
Cache memory budgeted by ways based on memory access type
VIA ALLIANCE SEMICONDUCTOR CO LTD2 citations73
US9911508B2Mar 6, 2018
Cache memory diagnostic writeback
VIA ALLIANCE SEMICONDUCTOR CO LTD2 citations73
US9817764B2Nov 14, 2017
Multiple data prefetchers that defer to one another based on prefetch effectiveness by memory access type
VIA ALLIANCE SEMICONDUCTOR CO LTD4 citations73
US9798668B2Oct 24, 2017
Multi-mode set associative cache memory dynamically configurable to selectively select one or a plurality of its sets depending upon the mode
VIA ALLIANCE SEMICONDUCTOR CO LTD4 citations73
US9652400B2May 16, 2017
Fully associative cache memory budgeted by memory access type
VIA ALLIANCE SEMICONDUCTOR CO LTD2 citations73
US9652398B2May 16, 2017
Cache replacement policy that considers memory access type
VIA ALLIANCE SEMICONDUCTOR CO LTD5 citations73
US11061853B2Jul 13, 2021
Processor with memory controller including dynamically programmable functional unit
VIA ALLIANCE SEMICONDUCTOR CO LTD0 citations52
US10642617B2May 5, 2020
Processor with an expandable instruction set architecture for dynamically configuring execution resources
VIA ALLIANCE SEMICONDUCTOR CO LTD0 citations52
US10268586B2Apr 23, 2019
Processor with programmable prefetcher operable to generate at least one prefetch address based on load requests
VIA ALLIANCE SEMICONDUCTOR CO LTD0 citations52
US10268587B2Apr 23, 2019
Processor with programmable prefetcher operable to generate at least one prefetch address based on load requests
VIA ALLIANCE SEMICONDUCTOR CO LTD0 citations52
US10146543B2Dec 4, 2018
Conversion system for a processor with an expandable instruction set architecture for dynamically configuring execution resources
VIA ALLIANCE SEMICONDUCTOR CO LTD1 citations52
US10073787B2Sep 11, 2018
Dynamic powering of cache memory by ways within multiple set groups based on utilization trends
VIA ALLIANCE SEMICONDUCTOR CO LTD1 citations52
US10067871B2Sep 4, 2018
Logic analyzer for detecting hangs
VIA ALLIANCE SEMICONDUCTOR CO LTD0 citations52
US9946651B2Apr 17, 2018
Pattern detector for detecting hangs
VIA ALLIANCE SEMICONDUCTOR CO LTD0 citations52
US9898411B2Feb 20, 2018
Cache memory budgeted by chunks based on memory access type
VIA ALLIANCE SEMICONDUCTOR CO LTD1 citations52
US9753799B2Sep 5, 2017
Conditional pattern detector for detecting hangs
VIA ALLIANCE SEMICONDUCTOR CO LTD0 citations52
US10698827B2Jun 30, 2020
Dynamic cache replacement way selection based on address tag bits
VIA ALLIANCE SEMICONDUCTOR CO LTD0 citations42
US10324842B2Jun 18, 2019
Distributed hang recovery logic
VIA ALLIANCE SEMICONDUCTOR CO LTD0 citations42
HONDA MOTOR CO LTD
6 patentsUS10380817B2Aug 13, 2019
System and method for providing hands free operation of at least one vehicle door
HONDA MOTOR CO LTD18 citations92
US11080952B2Aug 3, 2021
System and method for providing hands free operation of at least one vehicle door
HONDA MOTOR CO LTD3 citations71
US10815717B2Oct 27, 2020
System and method for providing hands free operation of at least one vehicle door
HONDA MOTOR CO LTD2 citations71
US10740993B2Aug 11, 2020
System and method for providing hands free operation of at least one vehicle door
HONDA MOTOR CO LTD1 citations71
US10515499B2Dec 24, 2019
System and method for providing hands free operation of at least one vehicle door
HONDA MOTOR CO LTD1 citations71
US10510200B2Dec 17, 2019
System and method for providing hands free operation of at least one vehicle door
HONDA MOTOR CO LTD2 citations71
SHANGHAI ZHAOXIN SEMICONDUCTOR CO LTD
2 patentsUS10725934B2Jul 28, 2020
Processor with selective data storage (of accelerator) operable as either victim cache data storage or accelerator memory and having victim cache tags in lower level cache wherein evicted cache line is stored in said data storage when said data storage is in a first mode and said cache line is stored in system memory rather then said data store when said data storage is in a second mode
SHANGHAI ZHAOXIN SEMICONDUCTOR CO LTD4 citations73
US11029949B2Jun 8, 2021
Neural network unit
SHANGHAI ZHAOXIN SEMICONDUCTOR CO LTD3 citations71