Inventor · disambiguated record
Peter Z. Onufryk
Also filed as: ONUFRYK PETER · ONUFRYK PETER Z · ONUFRYK PETER ZENON
45 granted patents·6 pending applications·1,398 citations·filing 1996–2025
99Inventor score
Top patents by PatentIndex Score
51 records- 0199US9813080B1Layer specific LDPC decoderMICROSEMI SOLUTIONS (U S ) INC·Filed 2015·Granted Nov 7, 2017·43 cites·33 claims
- 0299US8656257B1Nonvolatile memory controller with concatenated error correction codesMICHELONI RINO·Filed 2012·Granted Feb 18, 2014·69 cites·25 claims
- 0398US10230396B1Method and apparatus for layer-specific LDPC decodingMICROSEMI SOLUTIONS U S INC·Filed 2017·Granted Mar 12, 2019·35 cites·20 claims
- 0498US9128858B1Apparatus and method for adjusting a correctable raw bit error rate limit in a memory system using strong log-likelihood (LLR) valuesPMC SIERRA US INC·Filed 2013·Granted Sep 8, 2015·47 cites·27 claims
- 0598US8990661B1Layer specific attenuation factor LDPC decoderPMC SIERRA US INC·Filed 2013·Granted Mar 24, 2015·37 cites·20 claims
- 0698US8621318B1Nonvolatile memory controller with error detection for concatenated error correction codesMICHELONI RINO·Filed 2012·Granted Dec 31, 2013·113 cites·23 claims
- 0797US9397701B1System and method for lifetime specific LDPC decodingMICROSEMI STORAGE SOLUTIONS US INC·Filed 2013·Granted Jul 19, 2016·55 cites·22 claims
- 0897US8995302B1Method and apparatus for translated routing in an interconnect switchPMC SIERRA US INC·Filed 2013·Granted Mar 31, 2015·57 cites·17 claims
- 0997US8694849B1Shuffler error correction code system and methodMICHELONI RINO·Filed 2011·Granted Apr 8, 2014·51 cites·27 claims
- 1096US9235467B2System and method with reference voltage partitioning for low density parity check decodingPMC SIERRA US INC·Filed 2014·Granted Jan 12, 2016·28 cites·20 claims
- 1196US9092353B1Apparatus and method based on LDPC codes for adjusting a correctable raw bit error rate limit in a memory systemPMC SIERRA US INC·Filed 2013·Granted Jul 28, 2015·33 cites·9 claims
- 1296US8707122B1Nonvolatile memory controller with two-stage error correction technique for enhanced reliabilityMICHELONI RINO·Filed 2011·Granted Apr 22, 2014·46 cites·20 claims
- 1396US8554968B1Interrupt technique for a nonvolatile memory controllerONUFRYK PETER Z·Filed 2011·Granted Oct 8, 2013·66 cites·19 claims
- 1496US8429325B1PCI express switch and method for multi-port non-transparent switchingONUFRYK PETER Z·Filed 2010·Granted Apr 23, 2013·65 cites·30 claims
- 1595US9448881B1Memory controller and integrated circuit device for correcting errors in data read from memory cellsMICROSEMI STORAGE SOLUTIONS (US) INC·Filed 2015·Granted Sep 20, 2016·16 cites·7 claims
- 1695US9146890B1Method and apparatus for mapped I/O routing in an interconnect switchPMC SIERRA US INC·Filed 2013·Granted Sep 29, 2015·35 cites·19 claims
- 1795US9025495B1Flexible routing engine for a PCI express switch and method of usePMC SIERRA US INC·Filed 2013·Granted May 5, 2015·36 cites·20 claims
- 1894US9590656B2System and method for higher quality log likelihood ratios in LDPC decodingMICROSEMI STORAGE SOLUTIONS (US) INC·Filed 2014·Granted Mar 7, 2017·26 cites·18 claims
- 1994US9454414B2System and method for accumulating soft information in LDPC decodingMICROSEMI STORAGE SOLUTIONS (US) INC·Filed 2014·Granted Sep 27, 2016·25 cites·20 claims
- 2094US8588228B1Nonvolatile memory controller with host controller interface for retrieving and dispatching nonvolatile memory commands in a distributed mannerONUFRYK PETER Z·Filed 2011·Granted Nov 19, 2013·32 cites·17 claims
- 2190US7478186B1Interrupt coalescer for DMA channelINTEGRATED DEVICE TECH·Filed 2004·Granted Jan 13, 2009·96 cites·14 claims
- 2289US6498797B1Method and apparatus for communication services on a networkAT & T CORP·Filed 1998·Granted Dec 24, 2002·153 cites·29 claims
- 2383US8601346B1System and method for generating parity data in a nonvolatile memory controller by using a distributed processing techniqueONUFRYK PETER Z·Filed 2011·Granted Dec 3, 2013·5 cites·18 claims
- 2482US8656071B1System and method for routing a data message through a message networkONUFRYK PETER Z·Filed 2011·Granted Feb 18, 2014·7 cites·19 claims
- 2582US7334071B2Expansion of cross-domain addressing for PCI-express packets passing through non-transparent bridgeINTEGRATED DEVICE TECH·Filed 2005·Granted Feb 19, 2008·31 cites·12 claims
- 2679US2025370945A1Optimized transmission of priority packets via universal chiplet interconnect express (ucie) sideband linkCHOUDHARY SWADESH·Filed 2025·Application pending·0 cites
- 2776US8397144B1BCH data correction system and methodNORRIE CHRISTOPHER I W·Filed 2010·Granted Mar 12, 2013·6 cites·22 claims
- 2875US7852867B2Integrated memory for storing egressing packet data, replay data and to-be egressed dataINTEGRATED DEOICE TECHNOLOGY INC·Filed 2007·Granted Dec 14, 2010·11 cites·30 claims
- 2973US10410975B1Processed wafer of scalable electrical circuits, method for making same, and device comprising scaled electrical circuitsMICROSEMI SOLUTIONS U S INC·Filed 2015·Granted Sep 10, 2019·3 cites·16 claims
- 3073US7587439B1Method and apparatus for generating a random bit stream in true random number generator fashionINTERGRATED DEVICE TECHNOLOGY·Filed 2002·Granted Sep 8, 2009·23 cites·40 claims
- 3173US2025123989A1Optimized transmission and broadcasting of priority packets and critical events via ucie-sidebandCHOUDHARY SWADESH·Filed 2024·Application pending·0 cites
- 3272US7447195B1Packet telephony applianceAT & T CORP·Filed 2004·Granted Nov 4, 2008·13 cites·6 claims
- 3370US6826177B1Packet telephony applianceAT & T CORP·Filed 2000·Granted Nov 30, 2004·12 cites·21 claims
- 3469US12505065B2On-package die-to-die (D2D) interconnect for memory using universal chiplet interconnect express (UCIe) PHYINTEL CORP·Filed 2023·Granted Dec 23, 2025·0 cites·20 claims
- 3568US7353345B1External observation and control of data in a computing processorINTEGATED DEVICE TECHNOLOGY IN·Filed 2005·Granted Apr 1, 2008·6 cites·28 claims
- 3666US7773591B2Integrated memory for storing egressing packet data, replay data and to-be egressed dataINTEGRATED DEVICE TECH·Filed 2007·Granted Aug 10, 2010·4 cites·29 claims
- 3765US6707819B1Method and apparatus for the encapsulation of control information in a real-time data streamAT & T CORP·Filed 1999·Granted Mar 16, 2004·51 cites·27 claims
- 3861US7386774B1Memory unit with controller managing memory access through JTAG and CPU interfacesINTEGRATED DEVICE TECH·Filed 2004·Granted Jun 10, 2008·12 cites·19 claims
- 3961US5909369ACoordinating the states of a distributed finite state machineNETWORK MACHINES INC·Filed 1996·Granted Jun 1, 1999·29 cites·13 claims
- 4058US7827555B2Scheduler for a multiprocessing computing systemINTEGRATED DEVICE TECH·Filed 2005·Granted Nov 2, 2010·2 cites·18 claims
- 4157US2024030172A1Three dimensional universal chiplet interconnect as on-package interconnectINTEL CORP·Filed 2023·Application pending·0 cites
- 4256US8107479B2Method and system for telephony and high-speed data access on a broadband access networkBELLOVIN STEVEN MICHAEL·Filed 2003·Granted Jan 31, 2012·3 cites·4 claims
- 4356US7231539B1Reset circuit for resetting two clock domainsINTEGRATED DEVICE TECH·Filed 2004·Granted Jun 12, 2007·4 cites·27 claims
- 4455US2025123990A1On-package memory with universal chiplet interconnect expressDAS SHARMA DEBENDRA·Filed 2024·Application pending·0 cites
- 4554US6671742B1Method and apparatus for unifield control and data event exchange in a software systemAT & T CORP·Filed 2000·Granted Dec 30, 2003·4 cites·32 claims
- 4653US2024111701A1Dynamic switching of data transfers between sideband and mainbandINTEL CORP·Filed 2023·Application pending·0 cites
- 4752US8170007B2Packet telephony applianceCHAN MIKE·Filed 2008·Granted May 1, 2012·0 cites·6 claims
- 4852US7634774B2System and method of scheduling computing threadsINTEGRATED DEVICE TECH·Filed 2004·Granted Dec 15, 2009·3 cites·14 claims
- 4944US7167997B1Apparatus and method for limiting data transmission ratesINTEGRATED DEVICE TECH·Filed 2004·Granted Jan 23, 2007·0 cites·41 claims
- 5044US2006161919A1Implementation of load linked and store conditional operationsONUFRYK PETER Z·Filed 2004·Application pending·0 cites
Showing the top 50 of 51 patent records by PatentIndex Score.
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