Inventor
JIN ZHENRONG
US32 patents
⚠️ This page may combine multiple inventors who share the name “JIN ZHENRONG”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
IBM
23 patentsUS9917591B2Mar 13, 2018
Digital phase locked loop for low jitter applications
IBM12 citations92
US9906228B2Feb 27, 2018
Digital phase locked loop for low jitter applications
IBM12 citations92
US9819350B2Nov 14, 2017
Digital phase locked loop for low jitter applications
IBM11 citations92
US9806723B2Oct 31, 2017
Digital phase locked loop for low jitter applications
IBM13 citations92
US9455728B2Sep 27, 2016
Digital phase locked loop for low jitter applications
IBM11 citations92
US7943404B2May 17, 2011
Integrated millimeter wave antenna and transceiver on a substrate
IBM17 citations84
US10084460B2Sep 25, 2018
Digital phase locked loop for low jitter applications
IBM3 citations83
US10063243B2Aug 28, 2018
Digital phase locked loop for low jitter applications
IBM2 citations83
US10686452B2Jun 16, 2020
Digital phase locked loop for low jitter applications
IBM3 citations82
US8791726B2Jul 29, 2014
Controlled resonant power transfer
IBM4 citations73
US8012814B2Sep 6, 2011
Method of forming a high performance fet and a high voltage fet on a SOI substrate
IBM2 citations63
US7741857B2Jun 22, 2010
System and method for de-embedding a device under test employing a parametrized netlist
IBM6 citations63
US7627835B2Dec 1, 2009
Frequency divider monitor of phase lock loop
IBM3 citations63
US7362184B2Apr 22, 2008
Frequency divider monitor of phase lock loop
IBM4 citations63
US10103739B2Oct 16, 2018
Digital phase locked loop for low jitter applications
IBM0 citations62
US8581648B2Nov 12, 2013
High frequency quadrature PLL circuit and method
IBM4 citations62
US10958276B2Mar 23, 2021
Digital phase locked loop for low jitter applications
IBM0 citations61
US10566981B2Feb 18, 2020
Digital phase locked loop for low jitter applications
IBM0 citations61
US10164647B2Dec 25, 2018
Digital phase locked loop for low jitter applications
IBM0 citations61
US9252717B2Feb 2, 2016
Phase noise reduction in LC-VCO
IBM0 citations52
US10693471B2Jun 23, 2020
Digital phase locked loop for low jitter applications
IBM0 citations51
US10615806B2Apr 7, 2020
Digital phase locked loop for low jitter applications
IBM0 citations48
US7818074B2Oct 19, 2010
Methods to select golden devices for device model extractions
IBM0 citations41
DING HANYI
5 patentsUS8519892B2Aug 27, 2013
Integrated millimeter wave antenna and transceiver on a substrate
DING HANYI197 citations99
US8232920B2Jul 31, 2012
Integrated millimeter wave antenna and transceiver on a substrate
DING HANYI15 citations84
US8415999B2Apr 9, 2013
High frequency quadrature PLL circuit and method
DING HANYI12 citations83
US8399927B2Mar 19, 2013
Semiconductor structure including a high performance fet and a high voltage fet on an SOI substrate
DING HANYI5 citations73
US8120110B2Feb 21, 2012
Semiconductor structure including a high performance FET and a high voltage FET on a SOI substrate
DING HANYI0 citations52
AUSTIN JOHN S
3 patentsUS8525561B2Sep 3, 2013
Phase lock loop having high frequency CMOS programmable divider with large divide ratio
AUSTIN JOHN S4 citations60
US8471595B1Jun 25, 2013
Selectable dynamic/static latch with embedded logic
AUSTIN JOHN S3 citations60
US8791728B2Jul 29, 2014
High frequency CMOS programmable divider with large divide ratio
AUSTIN JOHN S0 citations39