Inventor
JOSHI MANDAR S
US13 patents
⚠️ This page may combine multiple inventors who share the name “JOSHI MANDAR S”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
INTEL CORP
12 patentsUS6006299ADec 21, 1999
Apparatus and method for caching lock conditions in a multi-processor system
INTEL CORP94 citations98
US5526510AJun 11, 1996
Method and apparatus for implementing a single clock cycle line replacement in a data cache unit
INTEL CORP157 citations97
US5715428AFeb 3, 1998
Apparatus for maintaining multilevel cache hierarchy coherency in a multiprocessor computer system
INTEL CORP82 citations96
US5680572AOct 21, 1997
Cache memory system having data and tag arrays and multi-purpose buffer assembly with multiple line buffers
INTEL CORP58 citations96
US5630075AMay 13, 1997
Write combining buffer for sequentially addressed partial line operations originating from a single instruction
INTEL CORP95 citations96
US9445209B2Sep 13, 2016
Mechanism and apparatus for seamless voice wake and speaker verification
INTEL CORP23 citations92
US10339935B2Jul 2, 2019
Context-aware enrollment for text independent speaker recognition
INTEL CORP7 citations83
US7319947B1Jan 15, 2008
Method and apparatus for performing distributed simulation utilizing a simulation backplane
INTEL CORP18 citations79
US7171347B2Jan 30, 2007
Logic verification in large systems
INTEL CORP10 citations77
US9852731B2Dec 26, 2017
Mechanism and apparatus for seamless voice wake and speaker verification
INTEL CORP3 citations72
US6198684B1Mar 6, 2001
Word line decoder for dual-port cache memory
INTEL CORP2 citations63
US10361933B2Jul 23, 2019
Method and apparatus for a power-efficient framework to maintain data synchronization of a mobile personal computer to simulate a connected scenario
INTEL CORP0 citations51