Inventor
MAE YOUICHIROU
JP4 patents
Patents
4 patentsUS6301692B1Oct 9, 2001
Method for designing layout of semiconductor integrated circuit, semiconductor integrated circuit obtained by the same method, and method for verifying timing thereof
MATSUSHITA ELECTRIC INDUSTRIAL CO LTD33 citations92
US5923569AJul 13, 1999
Method for designing layout of semiconductor integrated circuit semiconductor integrated circuit obtained by the same method and method for verifying timing thereof
MATSUSHITA ELECTRIC INDUSTRIAL CO LTD22 citations92
US5986292ANov 16, 1999
Semiconductor integrated logic circuit device
MATSUSHITA ELECTRIC INDUSTRIAL CO LTD24 citations91
US5983008ANov 9, 1999
Method for designing layout of semiconductor integrated circuit, semiconductor integrated circuit obtained by the same method, and method for verifying timing thereof
MATSUSHITA ELECTRIC INDUSTRIAL CO LTD10 citations73