Inventor
WILLENZ AVIGDOR
IL18 patents
⚠️ This page may combine multiple inventors who share the name “WILLENZ AVIGDOR”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
INTEGRATED DEVICE TECH
9 patentsUS5398211AMar 14, 1995
Structure and method for providing prioritized arbitration in a dual port memory
INTEGRATED DEVICE TECH127 citations95
US5175859ADec 29, 1992
Apparatus for disabling unused cache tag input/output pins during processor reset by sensing pull-down resistors connected to disabled pins
INTEGRATED DEVICE TECH22 citations92
US5386579AJan 31, 1995
Minimum pin-count multiplexed address/data bus with byte enable and burst address counter support microprocessor transmitting byte enable signals on multiplexed address/data bus having burst address counter for supporting signal datum and burst transfer
INTEGRATED DEVICE TECH25 citations89
US5586303ADec 17, 1996
Structure and method for providing a cache memory of selectable sizes
INTEGRATED DEVICE TECH26 citations88
US5553268ASep 3, 1996
Memory operations priority scheme for microprocessors
INTEGRATED DEVICE TECH22 citations86
US5649232AJul 15, 1997
Structure and method for multiple-level read buffer supporting optimal throttled read operations by regulating transfer rate
INTEGRATED DEVICE TECH17 citations73
US5517659AMay 14, 1996
Multiplexed status and diagnostic pins in a microprocessor with on-chip caches
INTEGRATED DEVICE TECH8 citations73
US5590310ADec 31, 1996
Method and structure for data integrity in a multiple level cache system
INTEGRATED DEVICE TECH18 citations71
US5894176AApr 13, 1999
Flexible reset scheme supporting normal system operation, test and emulation modes
INTEGRATED DEVICE TECH5 citations62
GALILEO TECHNOLOGIES LTD
4 patentsUS5923660AJul 13, 1999
Switching ethernet controller
GALILEO TECHNOLOGIES LTD81 citations95
US5841722ANov 24, 1998
First-in, first-out (FIFO) buffer
GALILEO TECHNOLOGIES LTD83 citations95
US5999981ADec 7, 1999
Switching ethernet controller providing packet routing
GALILEO TECHNOLOGIES LTD40 citations90
US5809557ASep 15, 1998
Memory array comprised of multiple FIFO devices
GALILEO TECHNOLOGIES LTD38 citations88