Inventor

WOLFE ANDREW

US52 patents

⚠️ This page may combine multiple inventors who share the name “WOLFE ANDREW”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

WOLFE ANDREW

WOLFE ANDREW

Sudden infant death prevention clothing

Snoring treatment

Microphone for remote health sensing

Tactile input interaction

Snoring treatment

Traffic flow model to provide traffic flow information

Method for the determination of a time, location, and quantity of goods to be made available based on mapped population activity

Camera flash mitigation

Dynamic scheduling interrupt controller for multiprocessors

Interrupt optimization for multiprocessors

Allocating threads to cores based on threads falling behind thread completion target deadline

Processor core clock rate selection

Allocating processor cores with cache memory associativity

Energy reservation in power limited networks

Operating system sandbox

Dynamic computation allocation

Securing backing storage data passed through a network

Processor core communication in multi-core processor

Traffic flow model to provide traffic flow information

Data centers task mapping

Power management for processor

OLED display and sensor

Mapping thread phases onto heterogeneous cores based on execution characteristics and cache line eviction counts

EMPIRE TECHNOLOGY DEV LLC

Cloud data backup storage manager

Processor core clock rate selection

Cloud data backup storage manager

Selectively securing data and/or erasing secure data caches responsive to security compromising conditions

Securing backing storage data passed through a network

Texture sensing

Power management for processor

Telemetrics based location and tracking

Cloud data backup storage manager

Camera flash mitigation

Microphone for remote health sensing

Cloud data backup storage

CONTE THOMAS MARTIN

Securing data caches through encryption

Noise cancellation for phone conversation

Techniques for detecting encrypted data

Hierarchical read-combining local memories

Thread-to-core mapping based on thread deadline, thread demand, and hardware characteristics data collected by a performance counter

Allocation of memory space to individual processor cores

Compiler based cache allocation

Routing across multicore networks using real world or modeled data

Direction and force sensing input device

UNIV COLUMBIA

Variable-length, high-speed asynchronous decoder circuit

High-speed asynchronous decoder circuit for variable-length coded data

GUNZE KK

Touch panel

LSTAR TECHNOLOGIES LLC

Interrupt arbitration for multiprocessors

S3 GRAPHICS CO LTD

Superscalar 3D graphics engine

AMAZON TECH INC

Antenna orchestration as a service