Inventor

FULLER NICHOLAS C M

US46 patents

⚠️ This page may combine multiple inventors who share the name “FULLER NICHOLAS C M”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

FULLER NICHOLAS C M

IBM

Dynamic parallel distributed job configuration in a shared-resource environment

Blockchain ledgers of material spectral signatures for supply chain integrity management

Multilayer hardmask scheme for damage-free dual damascene processing of SiCOH dielectrics

Sputter and surface modification etch processing for metal patterning in integrated circuits

Systems and methods for building and implementing ontology-based information resources

Subtractive plasma etching of a blanket layer of metal or metal alloy

Sublithographic patterning method incorporating a self-aligned single mask process

Sub-lithographic dimensioned air gap formation and related structure

Gate patterning of nano-channel devices

Blockchain ledgers of material spectral signatures for supply chain integrity management

Use of an organic planarizing mask for cutting a plurality of gate lines

De-fluorination of wafer surface and related structure

Multilayer hardmask scheme for damage-free dual damascene processing of SiCOH dielectrics

Offering application program interfaces (APIs) for sale in cloud marketplace

Base station power control in a mobile network

Waveguide polarization beam splitters and method of fabricating a waveguide wire-grid polarization beam splitter

Blockchain ledgers of material spectral signatures for supply chain integrity management

High selectivity nitride removal process based on selective polymer deposition

High selectivity nitride removal process based on selective polymer deposition

Sputter and surface modification etch processing for metal patterning in integrated circuits

Method of forming an interconnection structure in a organosilicate glass having a porous layer with higher carbon content located between two lower carbon content non-porous layers

Semiconductor interconnect structure utilizing a porous dielectric material as an etch stop layer between adjacent non-porous dielectric materials

Multilayer hardmask scheme for damage-free dual damascene processing of SiCOH dielectrics

High ion energy and reative species partial pressure plasma ash process

Automatic generation of license terms for service application marketplaces

Base station power control in a mobile network

Multiple layer resist scheme implementing etch recipe particular to each layer

High selectivity nitride removal process based on selective polymer deposition

High aspect ratio and reduced undercut trench etch process for a semiconductor substrate

Waveguide polarization beam splitters and method of fabricating a waveguide wire-grid polarization beam splitter

Pattern-based product identification with feedback

Automatic generation of license terms for service application marketplaces

High selectivity nitride removal process based on selective polymer deposition

Resist stripping methods using backfilling material layer

FULLER NICHOLAS C M

Use of an organic planarizing mask for cutting a plurality of gate lines

High aspect ratio and reduced undercut trench etch process for a semiconductor substrate

Gate patterning of nano-channel devices

BRINK MARKUS

Low energy etch process for nitrogen-containing dielectric layer

High fidelity patterning employing a fluorohydrocarbon-containing polymer

GLOBALFOUNDRIES INC

Low energy etch process for nitrogen-containing dielectric layer

Sputter and surface modification etch processing for metal patterning in integrated circuits

CHANG JOSEPHINE B

High selectivity nitride etch process

Borderless self-aligned metal contact patterning using printable dielectric materials

AFZALI-ARDAKANI ALI

Aqueous cerium-containing solution having an extended bath lifetime for removing mask material

ENGELMANN SEBASTIAN ULRICH

Structure with isotropic silicon recess profile in nanoscale dimensions

FISHER KATHRYN C

Solar cells with plated back side surface field and back side electrical contact and method of fabricating same