Inventor
FARLEY MARTIN
US6 patents
Patents
6 patentsUS6839773B2Jan 4, 2005
Method for enabling overlapped input/output requests to a logical device using assigned and parallel access unit control blocks
EMC CORP64 citations94
US6105085AAug 15, 2000
Lock mechanism for shared resources having associated data structure stored in common memory include a lock portion and a reserve portion
EMC CORP54 citations94
US6665739B2Dec 16, 2003
Method for enabling overlapped input/output requests to a logical device using assigned and parallel access unit control blocks
EMC CORP16 citations91
US6101588AAug 8, 2000
Device level busy arrangement for mass storage subsystem including a plurality of devices
EMC CORP39 citations90
US6990536B2Jan 24, 2006
Method for enabling overlapped input/output requests to a logical device from multiple hosts with explicit allegiances
EMC CORP8 citations71
US6665738B2Dec 16, 2003
Method for enabling overlapped input/output requests to a logical device from multiple hosts with explicit allegiances
EMC CORP5 citations71