P

Inventor

CHEN KUN-CHING

TW20 patents
⚠️ This page may combine multiple inventors who share the name “CHEN KUN-CHING”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

ADVANCED SEMICONDUCTOR ENG

19 patents
US6680529B2Jan 20, 2004

Semiconductor build-up package

ADVANCED SEMICONDUCTOR ENG154 citations98
US6528882B2Mar 4, 2003

Thermal enhanced ball grid array package

ADVANCED SEMICONDUCTOR ENG151 citations98
US6701614B2Mar 9, 2004

Method for making a build-up package of a semiconductor

ADVANCED SEMICONDUCTOR ENG89 citations97
US6191360B1Feb 20, 2001

Thermally enhanced BGA package

ADVANCED SEMICONDUCTOR ENG109 citations97
US6737300B2May 18, 2004

Chip scale package and manufacturing method

ADVANCED SEMICONDUCTOR ENG123 citations95
US7125745B2Oct 24, 2006

Multi-chip package substrate for flip-chip and wire bonding

ADVANCED SEMICONDUCTOR ENG26 citations92
US6750397B2Jun 15, 2004

Thermally enhanced semiconductor build-up package

ADVANCED SEMICONDUCTOR ENG23 citations92
US6423622B1Jul 23, 2002

Lead-bond type chip package and manufacturing method thereof

ADVANCED SEMICONDUCTOR ENG40 citations92
US6534852B1Mar 18, 2003

Ball grid array semiconductor package with improved strength and electric performance and method for making the same

ADVANCED SEMICONDUCTOR ENG55 citations90
US6313413B1Nov 6, 2001

Wire structure of substrate for layout detection

ADVANCED SEMICONDUCTOR ENG7 citations72
US6455941B1Sep 24, 2002

Chip scale package

ADVANCED SEMICONDUCTOR ENG13 citations71
US5982625ANov 9, 1999

Semiconductor packaging device

ADVANCED SEMICONDUCTOR ENG15 citations71
US6714421B2Mar 30, 2004

Flip chip package substrate

ADVANCED SEMICONDUCTOR ENG3 citations63
US6551855B1Apr 22, 2003

Substrate strip and manufacturing method thereof

ADVANCED SEMICONDUCTOR ENG5 citations63
US6642612B2Nov 4, 2003

Lead-bond type chip package and manufacturing method thereof

ADVANCED SEMICONDUCTOR ENG4 citations62
US7061347B2Jun 13, 2006

High frequency substrate comprised of dielectric layers of different dielectric coefficients

ADVANCED SEMICONDUCTOR ENG0 citations51
US6252309B1Jun 26, 2001

Packaged semiconductor substrate

ADVANCED SEMICONDUCTOR ENG0 citations50
US7061084B2Jun 13, 2006

Lead-bond type chip package and manufacturing method thereof

ADVANCED SEMICONDUCTOR ENG0 citations41
US6190529B1Feb 20, 2001

Method for plating gold to bond leads on a semiconductor substrate

ADVANCED SEMICONDUCTOR ENG0 citations34

LEE SHIH-CHANG

1 patent