Inventor

RILEY DWIGHT D

US43 patents

⚠️ This page may combine multiple inventors who share the name “RILEY DWIGHT D”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

RILEY DWIGHT D

HEWLETT PACKARD DEVELOPMENT CO

Supporting cyclic redundancy checking for PCI-X

Supporting error correction and improving error detection dynamically on the PCI-X bus

Priority transaction support on the PCI-X bus

System and method for remote direct memory access over a network switch fabric

Power management state distribution using an interconnect

Method and apparatus for allocating computer bus device resources to a priority requester and retrying requests from non-priority requesters

Isochronous transactions for interconnect busses of a computer system

Downstream broadcast PCI switch

Distributed system with cross-connect interconnect transaction aliasing

Correcting a target address in parallel with determining whether the target address was received in error

Distributed peer-to-peer communication for interconnect busses of a computer system

Methods and apparatus for extending a phase on an interconnect

Distributed peer-to-peer communication for interconnect busses of a computer system

Point-to-point electrical loading for a multi-drop bus

Quality of service with control flow packet filtering

COMPAQ COMPUTER CORP

System for requesting access to DMA channel having address not in DMA registers by replacing address of DMA register with address of requested DMA channel

Dual purpose computer bridge interface for accelerated graphics port or registered peripheral component interconnect devices

System for DMA controller sharing control signals in conventional mode and having separate control signals for each number of channels in distributed mode

Interfacing direct memory access devices to a non-ISA bus

Interfacing direct memory access devices to a non-ISA bus

Circuit for handling distributed arbitration in a computer system having multiple arbiters

Apparatus and method for positively and subtractively decoding addresses on a bus

Computer system utilizing two ISA busses coupled to a mezzanine bus

System for requesting access to DMA channel having address not in DMA registers by replacing address of DMA register with address of requested DMA channel

Bus system for shadowing registers

Bus system for shadowing registers

HEWLETT PACKARD ENTPR DEV LP

Dual-port non-volatile dual in-line memory modules

Extending supervisory services into trusted cloud operator domains

Method and system for facilitating high availability in a multi-fabric system

Method and system for facilitating high availability in a multi-fabric system

Securing transactions involving protected memory regions having different permission levels

Flexible high-availability computing with parallel configurable fabrics

Replicating data using dual-port non-volatile dual in-line memory modules

Enforcing reference operating state compliance for cloud computing-based compute appliances

RILEY DWIGHT D

Configuration and association of a supervisory virtual device function to a privileged entity

Sharing legacy devices in a multi-host environment

Method and apparatus for setting a primary port on a PCI bridge

System and method for multi-host sharing of a single-host device

System and method for a hierarchical interconnect network

COMPAQ INFORMATION TECHNOLOGIE

Method and apparatus for multiplexing and demultiplexing addresses of registered peripheral interconnect apparatus

MATTHEWS DAVID L

Presenting multi-function devices behind a switch hierarchy as a single function device

BROWNELL PAUL V

End-to-end flow control in a network

BRINKMANN HUBERT E

Virtual-interrupt-mode interface and method for virtualizing an interrupt mode