P

Inventor

MCFEELY FENTON R

US38 patents
⚠️ This page may combine multiple inventors who share the name “MCFEELY FENTON R”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

IBM

28 patents
US7488656B2Feb 10, 2009

Removal of charged defects from metal oxide-gate stacks

IBM79 citations98
US6982230B2Jan 3, 2006

Deposition of hafnium oxide and/or zirconium oxide and fabrication of passivated electronic structures

IBM112 citations98
US7270848B2Sep 18, 2007

Method for increasing deposition rates of metal layers from metal-carbonyl precursors

IBM45 citations96
US6448131B1Sep 10, 2002

Method for increasing the capacitance of a trench capacitor

IBM48 citations93
US7067422B2Jun 27, 2006

Method of forming a tantalum-containing gate electrode structure

IBM23 citations92
US6989321B2Jan 24, 2006

Low-pressure deposition of metal layers from metal-carbonyl precursors

IBM41 citations92
US6924223B2Aug 2, 2005

Method of forming a metal layer using an intermittent precursor gas flow process

IBM32 citations91
US6452276B1Sep 17, 2002

Ultra thin, single phase, diffusion barrier for metal conductors

IBM38 citations91
US7115959B2Oct 3, 2006

Method of forming metal/high-k gate stacks with high mobility

IBM17 citations90
US5395650AMar 7, 1995

Selective, low-temperature chemical vapor deposition of gold

IBM25 citations85
US7998864B2Aug 16, 2011

Noble metal cap for interconnect structures

IBM8 citations84
US7078341B2Jul 18, 2006

Method of depositing metal layers from metal-carbonyl precursors

IBM12 citations84
US6238737B1May 29, 2001

Method for protecting refractory metal thin film requiring high temperature processing in an oxidizing atmosphere and structure formed thereby

IBM14 citations74
US6803266B2Oct 12, 2004

Process for passivating the semiconductor-dielectric interface of a MOS device and MOS device formed thereby

IBM9 citations72
US6603181B2Aug 5, 2003

MOS device having a passivated semiconductor-dielectric interface

IBM9 citations72
US8785320B2Jul 22, 2014

Structure and process for metallization in high aspect ratio features

IBM1 citations63
US7964497B2Jun 21, 2011

Structure to facilitate plating into high aspect ratio vias

IBM2 citations63
US7884018B2Feb 8, 2011

Method for improving the selectivity of a CVD process

IBM6 citations63
US7667277B2Feb 23, 2010

TiC as a thermally stable p-metal carbide on high k SiO2 gate stacks

IBM4 citations63
US7145212B2Dec 5, 2006

Method for manufacturing device substrate with metal back-gate and structure formed thereby

IBM3 citations63
US6797604B2Sep 28, 2004

Method for manufacturing device substrate with metal back-gate and structure formed thereby

IBM3 citations63
US7189431B2Mar 13, 2007

Method for forming a passivated metal layer

IBM5 citations62
US7749802B2Jul 6, 2010

Process for chemical vapor deposition of materials with via filling capability and structure formed thereby

IBM1 citations52
US7566938B2Jul 28, 2009

Deposition of hafnium oxide and/or zirconium oxide and fabrication of passivated electronic structures

IBM0 citations52
US7521346B2Apr 21, 2009

Method of forming HfSiN metal for n-FET applications

IBM1 citations52
US7439180B2Oct 21, 2008

Dispenser system for atomic beam assisted metal organic chemical vapor deposition (MOCVD)

IBM1 citations52
US6579614B2Jun 17, 2003

Structure having refractory metal film on a substrate

IBM1 citations52
US7863083B2Jan 4, 2011

High temperature processing compatible metal gate electrode for pFETS and methods for fabrication

IBM1 citations51

YANG CHIH-CHAO

3 patents

TOKYO ELECTRON LTD

3 patents

HANNON JAMES B

1 patent

GLOBALFOUNDRIES INC

1 patent

ANDREONI WANDA

1 patent

GARDNER JENNIFER L

1 patent