Inventor
LE TIEC YANNICK
FR21 patents
⚠️ This page may combine multiple inventors who share the name “LE TIEC YANNICK”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
COMMISSARIAT ENERGIE ATOMIQUE
8 patentsUS9601511B2Mar 21, 2017
Low leakage dual STI integrated circuit including FDSOI transistors
COMMISSARIAT ENERGIE ATOMIQUE5 citations73
US9570465B2Feb 14, 2017
Dual STI integrated circuit including FDSOI transistors and method for manufacturing the same
COMMISSARIAT ENERGIE ATOMIQUE6 citations73
US9337350B2May 10, 2016
Transistor with reduced parasitic capacitance and access resistance of the source and drain, and method of fabrication of the same
COMMISSARIAT ENERGIE ATOMIQUE2 citations62
US9076732B2Jul 7, 2015
Method to prepare semi-conductor device comprising a selective etching of a silicium—germanium layer
COMMISSARIAT ENERGIE ATOMIQUE2 citations62
US9214515B2Dec 15, 2015
Method for making a semiconductor structure with a buried ground plane
COMMISSARIAT ENERGIE ATOMIQUE2 citations61
US9231062B2Jan 5, 2016
Method for treating the surface of a silicon substrate
COMMISSARIAT ENERGIE ATOMIQUE1 citations51
US8987854B2Mar 24, 2015
Microelectronic device with isolation trenches extending under an active area
COMMISSARIAT ENERGIE ATOMIQUE1 citations51
US8877618B2Nov 4, 2014
Method for producing a field effect transistor with a SiGe channel by ion implantation
COMMISSARIAT ENERGIE ATOMIQUE0 citations50
IBM
3 patentsUS9293474B2Mar 22, 2016
Dual channel hybrid semiconductor-on-insulator semiconductor devices
IBM1 citations52
US9059041B2Jun 16, 2015
Dual channel hybrid semiconductor-on-insulator semiconductor devices
IBM1 citations52
US8969966B2Mar 3, 2015
Defective P-N junction for backgated fully depleted silicon on insulator MOSFET
IBM1 citations52