Inventor
KOH HUI PENG
US12 patents
⚠️ This page may combine multiple inventors who share the name “KOH HUI PENG”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
CHARTERED SEMICONDUCTOR MFG
5 patentsUS7445978B2Nov 4, 2008
Method to remove spacer after salicidation to enhance contact etch stop liner stress on MOS
CHARTERED SEMICONDUCTOR MFG22 citations92
US7256084B2Aug 14, 2007
Composite stress spacer
CHARTERED SEMICONDUCTOR MFG12 citations83
US7745320B2Jun 29, 2010
Method for reducing silicide defects in integrated circuits
CHARTERED SEMICONDUCTOR MFG7 citations72
US7615427B2Nov 10, 2009
Spacer-less low-k dielectric processes
CHARTERED SEMICONDUCTOR MFG3 citations62
US7960283B2Jun 14, 2011
Method for reducing silicide defects in integrated circuits
CHARTERED SEMICONDUCTOR MFG0 citations50
GLOBALFOUNDRIES INC
4 patentsUS8940641B1Jan 27, 2015
Methods for fabricating integrated circuits with improved patterning schemes
GLOBALFOUNDRIES INC2 citations62
US9368453B2Jun 14, 2016
Overlay mark dependent dummy fill to mitigate gate height variation
GLOBALFOUNDRIES INC1 citations50
US9252061B2Feb 2, 2016
Overlay mark dependent dummy fill to mitigate gate height variation
GLOBALFOUNDRIES INC0 citations50
US8911920B2Dec 16, 2014
Methods for fabricating EUV masks and methods for fabricating integrated circuits using such EUV masks
GLOBALFOUNDRIES INC0 citations40