P

Inventor

DESAI SHAILENDRA S

US8 patents
⚠️ This page may combine multiple inventors who share the name “DESAI SHAILENDRA S”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

BROADCOM CORP

4 patents
US7320022B2Jan 15, 2008

System on a chip for caching of data packets based on a cache miss/hit and a state of a control signal

BROADCOM CORP20 citations92
US6957290B1Oct 18, 2005

Fast arbitration scheme for a bus

BROADCOM CORP28 citations92
US7287649B2Oct 30, 2007

System on a chip for packet processing

BROADCOM CORP8 citations73
US7076586B1Jul 11, 2006

Default bus grant to a bus agent

BROADCOM CORP7 citations73

APPLE INC

2 patents
US7836220B2Nov 16, 2010

Network direct memory access

APPLE INC5 citations62
US9367474B2Jun 14, 2016

Translating cache hints

APPLE INC0 citations41

MILLET TIMOTHY J

1 patent
US9176913B2Nov 3, 2015

Coherence switch for I/O traffic

MILLET TIMOTHY J60 citations95

DESAI SHAILENDRA S

1 patent
US8495257B2Jul 23, 2013

Network direct memory access

DESAI SHAILENDRA S3 citations56