Inventor

ZITZ JEFFREY A

US47 patents

⚠️ This page may combine multiple inventors who share the name “ZITZ JEFFREY A”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

ZITZ JEFFREY A

IBM

Segmentation of a die stack for 3D packaging thermal management

Method for directly joining a chip to a heat sink

Method for forming chip carrier with a single protective encapsulant

Multi integrated circuit chip carrier package

Electronic package method and structure with cure-melt hierarchy

High density thermal solution for direct attach modules

Cooling structure for electronic boards

Cooling structure for electronic boards

Cooling structure for electronic boards

Determining magnitude of compressive loading

IC chip package having force-adjustable member between stiffener and printed circuit board

Chip package having chip extension and method

Lid edge capping load

Chip module with stiffening frame and orthogonal heat spreader

Reducing directional stress in an orthotropic encapsulation member of an electronic package

Heat spreading layer with high thermal conductivity

Method and apparatus to form a reworkable seal on an electronic module

Disassemblable electronic assembly with leak-inhibiting coolant capillaries

Fabricating an integrated circuit chip module with stiffening frame and orthogonal heat spreader

Lid attach optimization to limit electronic package warpage

Lid attach optimization to limit electronic package warpage

Heatsink attachment module

Elastomer interposer with voids in a compressive loading system

Cooling structure for electronic boards

Conformal integrated circuit (IC) device package lid

Multi integrated circuit chip carrier package

Method of fabricating a chip module with stiffening frame and orthogonal heat spreader

Cooling structure for electronic boards

Lid attach optimization to limit electronic package warpage

Method of fabricating a chip module with stiffening frame and directional heat spreader

Lid attach optimization to limit electronic package warpage

Lid attach optimization to limit electronic package warpage

Multichip electronic packages and methods of manufacture

Multichip electronic packages and methods of manufacture

Test cell for laminate and method

Test cell for laminate and method

BODENWEBER PAUL F

Determining thermal interface material (TIM) thickness change

Determining magnitude of compressive loading

Non-hermetic sealed multi-chip module package

COLGAN EVAN G

Semiconductor device cooling module

Heatsink attachment module

KADAKIA SURESH D

Multichip electronic packages and methods of manufacture

Multichip electronic packages and methods of manufacture

BEAUMIER MARTIN M

Multichip electronic packages and methods of manufacture

Multichip electronic packages and methods of manufacture

BRUNSCHWILER THOMAS J

Electronic assembly with detachable coolant manifold and coolant-cooled electronic module

SIKKA KAMAL K

Multichip electronic packages and methods of manufacture