Inventor

ROY MIHIR K

US52 patents

⚠️ This page may combine multiple inventors who share the name “ROY MIHIR K”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

ROY MIHIR K

INTEL CORP

High density interconnect device and method

High density organic bridge device and method

Helical plated through-hole package inductor

Package with bi-layered dielectric structure

Hybrid core through holes and vias

High density organic bridge device and method

Method of making an inductor

High density interconnect device and method

Direct chip attach using embedded traces

Hybrid pitch package with ultra high density interconnect capability

Hybrid pitch package with ultra high density interconnect capability

Methods of forming a package substrate

High density organic bridge device and method

Solder resist layers for coreless packages and methods of fabrication

High density organic bridge device and method

Inductor formed in substrate

Weaved electrical components in a substrate package core

High density organic bridge device and method

Helical plated through-hole package inductor

High density interconnect device and method

Package power delivery using plane and shaped vias

Package power delivery using plane and shaped vias

Process for forming a semiconductor device substrate

Landside stiffening capacitors to enable ultrathin and other low-Z products

Device packaging with substrates having embedded lines and metal defined pads

In situ-built pin-grid arrays for coreless substrates, and methods of making same

Device packaging with substrates having embedded lines and metal defined pads

Patch on interposer through PGA interconnect structures

Substrate conductor structure and method

Substrate conductor structure and method

Electronic package and method of connecting a first die to a second die to form an electronic package

ROY MIHIR K

In situ-built pin-grid arrays for coreless substrates, and methods of making same

Hybrid-core through holes and vias

Through mold via polymer block package

Method of forming a circuit board

Through mold via polymer block package

ROBERTS BRENT M

Microelectronic package and method for a compression-based mid-level interconnect

Microelectronic package and method for a compression-based mid-level interconnect

Patch on interposer assembly and structures formed thereby

Patch on interposer assembly and structures formed thereby

KONCHADY MANOHAR S

Dual side solder resist layers for coreless packages and packages with an embedded interconnect bridge and their methods of fabrication

Heat dissipation device embedded within a microelectronic die

TAHOE RES LTD

High density interconnect device and method

High density interconnect device and method

CHASE HAROLD RYAN

Substrate conductor structure and method

Electronic package and method of connecting a first die to a second die to form an electronic package

MALLIK DEBENDRA

Reduced PTH pad for enabling core routing and substrate layer count reduction

CHASE HAROLD R

Non-cylindrical conducting shapes in multilayer laminated substrate cores

GUZEK JOHN S

Microelectronic device and method of manufacturing same

MANUSHAROW MATHEW J

Suspended inductor microelectronic structures