Inventor

CHOU HSUEH-LIANG

TW59 patents

⚠️ This page may combine multiple inventors who share the name “CHOU HSUEH-LIANG”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

CHOU HSUEH-LIANG

TAIWAN SEMICONDUCTOR MFG CO LTD

Semiconductor device and method of manufacturing the same

Methodology and structure for field plate design

Photodiode device and manufacturing method thereof

Lateral DMOS device with dummy gate

FinFET with trench field plate

Methodology and structure for field plate design

Methodology and structure for field plate design

Trench power MOSFET

Vertical power MOSFET and methods for forming the same

Apparatus and method for power MOS transistor

Trench power MOSFET

Methodology and structure for field plate design

Trench power MOSFET

Integrated circuit having a vertical power MOS transistor

Apparatus and method for power MOS transistor

Field structure and methodology

Transistor structure and manufacturing method of the same

Transistor structure and manufacturing method of the same

Integrated circuit having a vertical power MOS transistor

Lateral DMOS device with dummy gate

Apparatus and method for power MOS transistor

Lateral DMOS device with dummy gate

Integrated circuit having a vertical power MOS transistor

Vertical power MOSFET and methods of forming the same

FinFET with trench field plate

Apparatus and method for power MOS transistor

Vertical power MOSFET and methods for forming the same

Vertical power MOSFET and methods of forming the same

Integrated circuit having a vertical power MOS transistor

Vertical power MOSFET and methods of forming the same

Apparatus and method for power MOS transistor

Apparatus and method for power MOS transistor

Integrated circuit having a vertical power MOS transistor

TAIWAN SEMICONDUCTOR MFG

Trench power MOSFET

Method and device for wafer backside alignment overlay accuracy

Apparatus and method for power MOS transistor

Apparatus and method for power MOS transistor

Coupling well structure for improving HVMOS performance

Structures of high-voltage MOS devices with improved electrical performance

NG CHUN-WAI

Apparatus and method for power MOS transistor

Lateral DMOS device with dummy gate

Metal/polysilicon gate trench power mosfet

FinFET with trench field plate

Trench power MOSFET

SU PO-CHIH

Apparatus and method for power MOS transistor

Vertical power MOSFET and methods for forming the same

CHOU HSUEH-LIANG

MOSFET having source region formed in a double wells region

Semiconductor device having multi-thickness gate dielectric

YAO CHIH-WEN

High voltage devices, systems, and methods for forming the high voltage devices

UNIV NAT CHIAO TUNG

Method for manufacturing a combined solid immersion lens (SIL) and submicron aperture, and device thereof