Inventor

PERIYANNAN KIRUBAKARAN

US36 patents

⚠️ This page may combine multiple inventors who share the name “PERIYANNAN KIRUBAKARAN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

PERIYANNAN KIRUBAKARAN

WESTERN DIGITAL TECH INC

Different word line programming orders in non-volatile memory for error recovery

Semiconductor device including vertical bond pads

Memory device with latch-based neural network weight parity detection and trimming

Non-volatile storage with processive writes

Data storage device with noise injection

Non-volatile memory die with latch-based multiply-accumulate components

System and method for warpage detection in a CMOS bonded array

Straight wirebonding of silicon dies

Idle-power mitigation circuit

Data storage device and method for identifying a failing area of memory based on a cluster of bit errors

Non-volatile memory die with bit-flip object insertion

Data storage device having over-voltage detection and protection

Multiple stage fuse circuitry for counting failure events

Voltage sharing across memory dies in response to a charge pump failure

Clamped semiconductor wafers and semiconductor devices

Semiconductor device including coupled bond pads having differing numbers of pad legs

System and method for die crack detection in a CMOS bonded array

Data storage device with noise injection

Data storage device with data verification circuitry

SANDISK TECHNOLOGIES LLC

Prevention of neighboring plane disturb in non-volatile memory

Partial memory die

High-speed data path testing techniques for non-volatile memory

Partial memory die with masked verify

Mapping consecutive logical block addresses to consecutive good blocks in memory device

Circuit for detecting pin-to-pin leaks of an integrated circuit package

Clock frequency counting during high-voltage operations for immediate leakage detection and response

Die crack detection

Systems and methods for capacity management of a memory system

Semiconductor device including fractured semiconductor dies

Recovery of partial memory die

Partial memory die with inter-plane re-mapping

SANDISK TECHNOLOGIES INC

Solid-state drive secure data wiping for reuse and recycling

Location-based maintenance operations for a data storage device

PEKNY THEODORE T

SPI NAND protected mode entry methodology

PERIYANNAN KIRUBAKARAN

Protecting groups of memory cells in a memory device

MICRON TECHNOLOGY INC

Protecting groups of memory cells in a memory device