Inventor
DASASATHYAN SRINIVASAN
US25 patents
⚠️ This page may combine multiple inventors who share the name “DASASATHYAN SRINIVASAN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
XILINX INC
18 patentsUS6789244B1Sep 7, 2004
Placement of clock objects under constraints
XILINX INC178 citations98
US7143380B1Nov 28, 2006
Method for application of network flow techniques under constraints
XILINX INC97 citations97
US6857115B1Feb 15, 2005
Placement of objects with partial shape restriction
XILINX INC15 citations84
US11003826B1May 11, 2021
Automated analysis and optimization of circuit designs
XILINX INC16 citations79
US7149994B1Dec 12, 2006
Integrated clock and input output placer
XILINX INC8 citations74
US7313778B1Dec 25, 2007
Method system and apparatus for floorplanning programmable logic designs
XILINX INC8 citations73
US7149993B1Dec 12, 2006
Method, system, and apparatus for incremental design in programmable logic devices using floorplanning
XILINX INC7 citations73
US9501604B1Nov 22, 2016
Testing critical paths of a circuit design
XILINX INC5 citations68
US10867093B1Dec 15, 2020
System and method for an electronic design tool providing automated guidance and interface for circuit design processing
XILINX INC4 citations66
US7636876B1Dec 22, 2009
Cost-based performance driven legalization technique for placement in logic designs
XILINX INC5 citations62
US7392499B1Jun 24, 2008
Placement of input/output blocks of an electronic design in an integrated circuit
XILINX INC4 citations62
US11586791B1Feb 21, 2023
Visualization of data buses in circuit designs
XILINX INC0 citations60
US7735039B1Jun 8, 2010
Methods of estimating net delays in tile-based PLD architectures
XILINX INC6 citations60
US7240315B1Jul 3, 2007
Automated local clock placement for FPGA designs
XILINX INC4 citations59
US11714950B2Aug 1, 2023
Automated timing closure on circuit designs
XILINX INC1 citations56
US12591729B2Mar 31, 2026
Alignment of macros based on anchor locations
XILINX INC0 citations46
US12462082B2Nov 4, 2025
Satisfying circuit design constraints using a combination of machine learning models
XILINX INC0 citations41
US12019964B1Jun 25, 2024
Optimizing use of computer resources in implementing circuit designs through machine learning
XILINX INC0 citations41
TOM MARVIN
3 patentsUS8418115B1Apr 9, 2013
Routability based placement for multi-die integrated circuits
TOM MARVIN36 citations92
US8091060B1Jan 3, 2012
Clock domain partitioning of programmable integrated circuits
TOM MARVIN10 citations82
US8225262B1Jul 17, 2012
Method of and system for placing clock circuits in an integrated circuit
TOM MARVIN10 citations80