Inventor
THURAIRAJARATNAM ARITHARAN
US27 patents
⚠️ This page may combine multiple inventors who share the name “THURAIRAJARATNAM ARITHARAN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
LSI LOGIC CORP
23 patentsUS5903050AMay 11, 1999
Semiconductor package having capacitive extension spokes and method for making the same
LSI LOGIC CORP181 citations96
US6608376B1Aug 19, 2003
Integrated circuit package substrate with high density routing mechanism
LSI LOGIC CORP81 citations95
US6531932B1Mar 11, 2003
Microstrip package having optimized signal line impedance control
LSI LOGIC CORP23 citations92
US6496081B1Dec 17, 2002
Transmission equalization system and an integrated circuit package employing the same
LSI LOGIC CORP23 citations92
US6872321B2Mar 29, 2005
Direct positive image photo-resist transfer of substrate design
LSI LOGIC CORP43 citations89
US7081672B1Jul 25, 2006
Substrate via layout to improve bias humidity testing reliability
LSI LOGIC CORP15 citations83
US6744130B1Jun 1, 2004
Isolated stripline structure
LSI LOGIC CORP18 citations83
US6459049B1Oct 1, 2002
High density signal routing
LSI LOGIC CORP14 citations83
US6225690B1May 1, 2001
Plastic ball grid array package with strip line configuration
LSI LOGIC CORP15 citations82
US6791177B1Sep 14, 2004
Integrated circuit packaging that uses guard conductors to isolate noise-sensitive signals within the package substrate
LSI LOGIC CORP8 citations73
US6946866B2Sep 20, 2005
Measurement of package interconnect impedance using tester and supporting tester
LSI LOGIC CORP7 citations72
US6555914B1Apr 29, 2003
Integrated circuit package via
LSI LOGIC CORP7 citations72
US6396140B1May 28, 2002
Single reference plane plastic ball grid array package
LSI LOGIC CORP8 citations72
US6127728AOct 3, 2000
Single reference plane plastic ball grid array package
LSI LOGIC CORP6 citations72
US6891392B2May 10, 2005
Substrate impedance measurement
LSI LOGIC CORP3 citations61
US6717423B1Apr 6, 2004
Substrate impedance measurement
LSI LOGIC CORP3 citations61
US6825554B2Nov 30, 2004
PBGA electrical noise isolation of signal traces
LSI LOGIC CORP3 citations60
US6566167B1May 20, 2003
PBGA electrical noise isolation of signal traces
LSI LOGIC CORP4 citations60
US6534968B1Mar 18, 2003
Integrated circuit test vehicle
LSI LOGIC CORP3 citations58
US6825066B2Nov 30, 2004
Stiffener design
LSI LOGIC CORP1 citations51
US6777803B2Aug 17, 2004
Solder mask on bonding ring
LSI LOGIC CORP1 citations46
US7024637B2Apr 4, 2006
Functionality based package design for integrated circuit blocks
LSI LOGIC CORP0 citations42
US7319272B2Jan 15, 2008
Ball assignment system
LSI LOGIC CORP0 citations41
LSI CORP
3 patentsUS7791210B2Sep 7, 2010
Semiconductor package having discrete non-active electrical components incorporated into the package
LSI CORP20 citations89
US7829424B2Nov 9, 2010
Package configuration and manufacturing method enabling the addition of decoupling capacitors to standard package designs
LSI CORP2 citations60
US7508062B2Mar 24, 2009
Package configuration and manufacturing method enabling the addition of decoupling capacitors to standard package designs
LSI CORP1 citations49