Inventor
VAN DUUREN MICHIEL JOS
NL14 patents
⚠️ This page may combine multiple inventors who share the name “VAN DUUREN MICHIEL JOS”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
NXP BV
9 patentsUS7214579B2May 8, 2007
Self-aligned 2-bit “double poly CMP” flash memory cell
NXP BV123 citations97
US8958248B2Feb 17, 2015
2T and flash memory array
NXP BV10 citations80
US7746715B2Jun 29, 2010
Erase and read schemes for charge trapping non-volatile memories
NXP BV5 citations61
US7709879B2May 4, 2010
Non-volatile memory with erase gate on isolation zones
NXP BV4 citations60
US7419875B2Sep 2, 2008
Shallow trench isolation in floating gate devices
NXP BV2 citations60
US11670394B2Jun 6, 2023
Temperature exposure detection based on memory cell retention error rate
NXP BV0 citations51
US9269706B2Feb 23, 2016
Method of processing a silicon wafer and a silicon integrated circuit
NXP BV1 citations51
US7763512B2Jul 27, 2010
Shallow trench isolation in floating gate devices
NXP BV0 citations48
US7429513B2Sep 30, 2008
Method of manufacturing a semiconductor device
NXP BV0 citations39