Inventor

SMITH ELLIOT JOHN

US32 patents

⚠️ This page may combine multiple inventors who share the name “SMITH ELLIOT JOHN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

SMITH ELLIOT JOHN

GLOBALFOUNDRIES INC

Front-end-of-line device structure and method of forming such a front-end-of-line device structure

Integrated circuit including a dummy gate structure and method for the formation thereof

Wafer with SOI structure having a buried insulating multilayer structure and semiconductor device structure

Semiconductor structure including a first transistor at a semiconductor-on-insulator region and a second transistor at a bulk region and method for the formation thereof

BULEX contacts in advanced FDSOI techniques

High voltage transistor using buried insulating layer as gate dielectric

Technique and related semiconductor devices based on crystalline semiconductor material formed on the basis of deposited amorphous semiconductor material

SOI-based floating gate memory cell

Methods for forming integrated circuits that include a dummy gate structure

Process monitoring for gate cut mask

Method of forming a semiconductor device structure and semiconductor device structure

Capacitor structure and method of forming a capacitor structure

Semiconductor devices including self-aligned active regions for planar transistor architecture

Method of forming a gate mask for fabricating a structure of gate lines

Technique for defining active regions of semiconductor devices with reduced lithography effort

Semiconductor structure including a trench capping layer and method for the formation thereof

Semiconductor device with interconnect to source/drain

Deep fence isolation for logic cells

Dual-depth STI cavity extension and method of production thereof

Semiconductor devices including Si/Ge active regions with different Ge concentrations

Gate structure with dual width electrode layer

Early gate silicidation in transistor elements

Gate patterning for AC and DC performance boost

Inline monitoring of transistor-to-transistor critical dimension

High-voltage transistor device with thick gate insulation layers

High-voltage transistor device with thick gate insulation layers

Semiconductor structure including a trench capping layer

Continental automotive systems inc

Lidar system with crosstalk reduction comprising a power supply circuit layer stacked between an avalanche-type diode layer and a read-out circuit layer

Method of making and using a reusable mold for fabrication of optical elements

GLOBALFOUNDRIES US INC

Semiconductor devices having silicon/germanium active regions with different germanium concentrations

Semiconductor device with interconnect to source/drain

SMITH ELLIOT JOHN

Portable environment monitoring and early warning system for babies