Inventor
WOOD MICHAEL HEMSLEY
US16 patents
Patents
16 patentsUS10831954B1Nov 10, 2020
Technology lookup table-based default assertion generation and consumption for timing closure of VLSI designs
IBM2 citations66
US12271674B2Apr 8, 2025
Generating a power delivery network based on the routing of signal wires within a circuit design
IBM0 citations61
US11906570B2Feb 20, 2024
Processor frequency improvement based on antenna optimization
IBM0 citations61
US11754615B2Sep 12, 2023
Processor frequency improvement based on antenna optimization
IBM0 citations61
US11093675B1Aug 17, 2021
Statistical timing analysis considering multiple-input switching
IBM1 citations61
US8001411B2Aug 16, 2011
Generating a local clock domain using dynamic controls
IBM3 citations61
US7971162B2Jun 28, 2011
Verification of spare latch placement in synthesized macros
IBM4 citations61
US12547809B2Feb 10, 2026
Bit flip aware latch placement
IBM0 citations59
US6229754B1May 8, 2001
Write through function for a memory
IBM2 citations59
US11797740B2Oct 24, 2023
Even apportionment based on positive timing slack threshold
IBM0 citations56
US7676776B2Mar 9, 2010
Spare gate array cell distribution analysis
IBM5 citations56
US10254784B1Apr 9, 2019
Using required arrival time constraints for coupled noise analysis and noise aware timing analysis of out-of-context (OOC) hierarchical entities
IBM1 citations55
US12204832B2Jan 21, 2025
Logical clock connection in an integrated circuit design
IBM0 citations49
US11074379B2Jul 27, 2021
Multi-cycle latch tree synthesis
IBM0 citations49
US11916384B2Feb 27, 2024
Region-based power grid generation through modification of an initial power grid based on timing analysis
IBM0 citations48
US12282721B2Apr 22, 2025
Netlist design for post silicon local clock controller timing improvement
IBM0 citations47