Inventor

LO HSIEN-CHING

US31 patents

⚠️ This page may combine multiple inventors who share the name “LO HSIEN-CHING”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

LO HSIEN-CHING

GLOBALFOUNDRIES INC

Method of forming vertical field effect transistors with different gate lengths and a resulting structure

Asymmetric spacer for preventing epitaxial merge between adjacent devices of a semiconductor and related method

Multi-layer spacer used in finFET

Multiple Fin heights with dielectric isolation

Multiple-layer spacers for field-effect transistors

Methods of forming EPI semiconductor material on the source/drain regions of a FinFET device

Intergrated circuit structure including single diffusion break abutting end isolation region, and methods of forming same

Wrap-all-around contact for nanosheet-FET and method of forming same

Integrated circuit structure incorporating non-planar field effect transistors with different channel region heights and method

Vertical-transport field-effect transistors with an etched-through source/drain cavity

FinFETs having gates parallel to fins

Multiple gate length device with self-aligned top junction

Method of forming a vertical field effect transistor (VFET) and a VFET structure

Boundary spacer structure and integration

Vertical-transport field-effect transistors with an etched-through source/drain cavity

Dual-curvature cavity for epitaxial semiconductor growth

Etch stop layer for use in forming contacts that extend to multiple depths

Multiple-layer spacers for field-effect transistors

Methods of forming epi semiconductor material on a thinned fin in the source/drain regions of a FinFET device

FinFET device with a wrap-around silicide source/drain contact structure

Fin-type transistors with spacers on the gates

Field-effect transistors with improved dielectric gap fill

Single-curvature cavity for semiconductor epitaxy

Finfet diffusion break having protective liner in fin insulator

Epitaxial region for embedded source/drain region having uniform thickness

TAIWAN SEMICONDUCTOR MFG

Strained semiconductor device with recessed channel

Gate structure having lightly doped region

FUNG KA-HING

Self-aligned two-step STI formation through dummy poly removal

GLOBALFOUNDRIES US INC

Single diffusion break device for FDSOI

CHENG CHUN-FAI

Semiconductor device and method of manufacturing the same

HING FUNG KA

Method for fabricating a gate structure