Inventor
NATU MAHESH
US25 patents
⚠️ This page may combine multiple inventors who share the name “NATU MAHESH”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
INTEL CORP
21 patentsUS5790850AAug 4, 1998
Fault resilient booting for multiprocessor computer systems
INTEL CORP71 citations95
US7984286B2Jul 19, 2011
Apparatus and method for secure boot environment
INTEL CORP36 citations92
US7493460B2Feb 17, 2009
Preboot memory of a computer system
INTEL CORP27 citations92
US5835704ANov 10, 1998
Method of testing system memory
INTEL CORP48 citations92
US10691839B2Jun 23, 2020
Method, apparatus, and system for manageability and secure routing and endpoint access
INTEL CORP1 citations70
US11789889B2Oct 17, 2023
Mechanism for device interoperability of switches in computer buses
INTEL CORP0 citations62
US11704181B2Jul 18, 2023
Apparatus and method for scalable error detection and reporting
INTEL CORP0 citations62
US11385952B2Jul 12, 2022
Apparatus and method for scalable error detection and reporting
INTEL CORP0 citations62
US11216404B2Jan 4, 2022
Mechanism for device interoperability of switches in computer buses
INTEL CORP0 citations62
US10922161B2Feb 16, 2021
Apparatus and method for scalable error detection and reporting
INTEL CORP0 citations62
US11741227B2Aug 29, 2023
Platform security mechanism
INTEL CORP0 citations61
US9465647B2Oct 11, 2016
Providing state storage in a processor for system management mode selectively enabled by register bit instead of external SMRAM
INTEL CORP2 citations61
US12452034B2Oct 21, 2025
Exposing cryptographic measurements of peripheral component interconnect express (PCIE) device controller firmware
INTEL CORP0 citations60
US11522679B2Dec 6, 2022
Exposing cryptographic measurements of peripheral component interconnect express (PCIe) device controller firmware
INTEL CORP1 citations60
US11954047B2Apr 9, 2024
Circuitry and methods for spatially unique and location independent persistent memory encryption
INTEL CORP0 citations58
US12314397B2May 27, 2025
Support of PCIe device with multiple security policies
INTEL CORP0 citations51
US10169268B2Jan 1, 2019
Providing state storage in a processor for system management mode
INTEL CORP0 citations51
US9971912B2May 15, 2018
Method, apparatus, and system for manageability and secure routing and endpoint access
INTEL CORP0 citations49
US12457271B2Oct 28, 2025
System, apparatus and method for handling multi-protocol traffic in data link layer circuitry
INTEL CORP0 citations48
US11048626B1Jun 29, 2021
Technology to ensure sufficient memory type range registers to fully cache complex memory configurations
INTEL CORP0 citations48
US11222119B2Jan 11, 2022
Technologies for secure and efficient native code invocation for firmware services
INTEL CORP0 citations47
NATU MAHESH
3 patentsUS9411762B2Aug 9, 2016
Method and system for platform management messages across peripheral component interconnect express (PCIe) segments
NATU MAHESH11 citations82
US8930609B2Jan 6, 2015
Method, apparatus, and system for manageability and secure routing and endpoint access
NATU MAHESH8 citations82
US8392985B2Mar 5, 2013
Security management in system with secure memory secrets
NATU MAHESH1 citations44